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AD9203ARU Arkusz danych(PDF) 2 Page - Analog Devices |
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AD9203ARU Arkusz danych(HTML) 2 Page - Analog Devices |
2 / 19 page REV. 0 –2– AD9203–SPECIFICATIONS REV. 0 (AVDD = +3 V, DRVDD = +3 V, FS = 40 MSPS, input span from 0.5 V to 2.5 V, Internal 1 V Reference, PWRCON = AVDD, 50% clock duty cycle, TMIN to TMAX unless otherwise noted.) Parameter Symbol Min Typ Max Units Conditions RESOLUTION 10 Bits MAX CONVERSION RATE FS 40 MSPS PIPELINE DELAY 5.5 Clock Cycles DC ACCURACY Differential Nonlinearity DNL ±0.25 ±0.7 LSB Integral Nonlinearity INL ±0.65 ±1.4 LSB Offset Error EZS ±0.6 ±2.8 % FSR Gain Error EFS ±0.7 ±4.0 % FSR ANALOG INPUT Input Voltage Range AIN 1 2 V p-p Input Capacitance CIN 1.4 pF Switched, Single-Ended Aperture Delay TAP 2.0 ns Aperture Uncertainty (Jitter) TAJ 1.2 ps rms Input Bandwidth (–3 dB) BW 390 MHz Input Referred Noise 0.3 mV INTERNAL REFERENCE Output Voltage (0.5 V Mode) VREF 0.5 V REFSENSE = VREF Output Voltage (1 V Mode) VREF 1 V REFSENSE = GND Output Voltage Tolerance (1 V Mode) ±5 ±30 mV Load Regulation 0.65 1.2 mV 1.0 mA Load POWER SUPPLY Operating Voltage AVDD 2.7 3.0 3.6 V DRVDD 2.7 3.0 3.6 V Analog Supply Current IAVDD 20.1 22.0 mA Digital Supply Current IDRVDD 4.4 6.0 mA fIN = 4.8 MHz, Output Bus Load = 10 pF 9.5 14.0 mA fIN = 20 MHz, Output Bus Load = 20 pF Power Consumption 74 84.0 mW fIN = 4.8 MHz, Output Bus Load = 10 pF 88.8 108.0 mW fIN = 20 MHz, Output Bus Load = 20 pF Power-Down PD 0.65 1.2 mW Power Supply Rejection Ratio PSRR 0.04 ±0.25 % FS DYNAMIC PERFORMANCE (AIN = 0.5 dBFS) Signal-to-Noise and Distortion SINAD Note 1 f = 4.8 MHz 59.7 dB f = 20 MHz 57.2 59.3 dB Effective Bits ENOB f = 4.8 MHz 9.6 Bits Note 1 f = 20 MHz 9.2 9.55 Bits Signal-to-Noise Ratio SNR f = 4.8 MHz 60.0 dB f = 20 MHz 57.5 59.5 dB Total Harmonic Distortion THD f = 4.8 MHz –76.0 dB Note 1 f = 20 MHz –74.0 –65.0 dB Spurious Free Dynamic Range SFDR f = 4.8 MHz 80 dB Note 1 f = 20 MHz 67.8 78 dB Two-Tone Intermodulation Distortion IMD 68 dB f = 44.49 MHz and 45.52 MHz Differential Phase DP 0.2 Degree NTSC 40 IRE Ramp Differential Gain DG 0.3 % DIGITAL INPUTS High Input Voltage VIH 2.0 V Low Input Voltage VIL 0.4 V Clock Pulsewidth High 11.25 ns Clock Pulsewidth Low 11.25 ns Clock Period 2 25 ns |
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