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AD9203-EB Arkusz danych(PDF) 5 Page - Analog Devices |
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AD9203-EB Arkusz danych(HTML) 5 Page - Analog Devices |
5 / 19 page REV. 0 AD9203 REV. 0 –5– PIN FUNCTION DESCRIPTIONS Pin Name Description 1 DRVSS Digital Ground 2 DRVDD Digital Supply 3 D0 Bit 0, Least Significant Bit 4 D1 Bit 1 5 D2 Bit 2 6 D3 Bit 3 7 D4 Bit 4 8 D5 Bit 5 9 D6 Bit 6 10 D7 Bit 7 11 D8 Bit 8 12 D9 Bit 9, Most Significant Bit 13 OTR Out-of-Range Indicator 14 DFS Data Format Select. (HI: Twos Complement. LO: Straight Binary) 15 CLK Clock Input 16 3-STATE HI: High Impedance State Output. LO: Active Digital Output Drives 17 STBY HI: Power-Down Mode. LO: Normal Operation 18 REFSENSE Reference Select 19 CLAMP HI: Enable Clamp. LO: Open Clamp 20 CLAMPIN Clamp Signal Input 21 PWRCON Power Control Input 22 REFTF Top Reference Decoupling 23 VREF Reference In/Out 24 REFBF Bottom Reference Decoupling 25 AINP Noninverting Analog Input 26 AINN Inverting Analog Input 27 AVSS Analog Ground 28 AVDD Analog Supply PIN CONFIGURATION TOP VIEW (Not to Scale) AD9203 DFS OTR (MSB) D9 D8 D7 D6 D5 DRVSS DRVDD (LSB) D0 D1 D4 D3 D2 CLK 3-STATE STBY REFSENSE CLAMP CLAMPIN PWRCON AVDD AVSS AINN AINP REFTF VREF REFBF 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 |
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