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DAC104S085CISDX Arkusz danych(PDF) 7 Page - Texas Instruments |
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DAC104S085CISDX Arkusz danych(HTML) 7 Page - Texas Instruments |
7 / 29 page DAC104S085 www.ti.com SNAS362E – MAY 2006 – REVISED OCTOBER 2012 A.C. and Timing Characteristics (continued) Values shown in this table are design targets and are subject to change before product release. The following specifications apply for VA = +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 12 to 1011. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified. Units Symbol Parameter Conductions Typical(1) Limits(1) (Limits) tCL SCLK Low Time 7 10 ns (min) SYNC Set-up Time prior to SCLK tSS 4 10 ns (min) Falling Edge Data Set-Up Time prior to SCLK Falling tDS 1.5 3.5 ns (min) Edge Data Hold Time after SCLK Falling tDH 1.5 3.5 ns (min) Edge tCFSR SCLK fall prior to rise of SYNC 0 3 ns (min) tSYNC SYNC High Time 6 10 ns (min) Specification Definitions DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1 LSB, which is VREF / 1024 = VA / 1024. DAC-to-DAC CROSSTALK is the glitch impulse transferred to a DAC output in response to a full-scale change in the output of another DAC. DIGITAL CROSSTALK is the glitch impulse transferred to a DAC output at mid-scale in response to a full-scale change in the input register of another DAC. DIGITAL FEEDTHROUGH is a measure of the energy injected into the analog output of the DAC from the digital inputs when the DAC outputs are not updated. It is measured with a full-scale code change on the data bus. FULL-SCALE ERROR is the difference between the actual output voltage with a full scale code (3FFh) loaded into the DAC and the value of VA x 1023 / 1024. GAIN ERROR is the deviation from the ideal slope of the transfer function. It can be calculated from Zero and Full-Scale Errors as GE = FSE - ZE, where GE is Gain error, FSE is Full-Scale Error and ZE is Zero Error. GLITCH IMPULSE is the energy injected into the analog output when the input code to the DAC register changes. It is specified as the area of the glitch in nanovolt-seconds. INTEGRAL NON-LINEARITY (INL) is a measure of the deviation of each individual code from a straight line through the input to output transfer function. The deviation of any given code from this straight line is measured from the center of that code value. The end point method is used. INL for this product is specified over a limited range, per the Electrical Tables. LEAST SIGNIFICANT BIT (LSB) is the bit that has the smallest value or weight of all bits in a word. This value is LSB = VREF / 2 n where • where VREF is the supply voltage for this product, and "n" is the DAC resolution in bits, which is 10 for the DAC104S085. (1) MAXIMUM LOAD CAPACITANCE is the maximum capacitance that can be driven by the DAC with output stability maintained. MONOTONICITY is the condition of being monotonic, where the DAC has an output that never decreases when the input code increases. MOST SIGNIFICANT BIT (MSB) is the bit that has the largest value or weight of all bits in a word. Its value is 1/2 of VA. MULTIPLYING BANDWIDTH is the frequency at which the output amplitude falls 3dB below the input sine wave Copyright © 2006–2012, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: DAC104S085 |
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