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OP176GP Arkusz danych(PDF) 3 Page - Analog Devices

Numer części OP176GP
Szczegółowy opis  Bipolar/JFET, Audio Operational Amplifier
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OP176GP Arkusz danych(HTML) 3 Page - Analog Devices

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OP176
REV. 0
–3–
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±22 V
Input Voltage
2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±18 V
Differential Input Voltage
2 . . . . . . . . . . . . . . . . . . . . . . .
±7.5 V
Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite
Storage Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65
°C to +150°C
Operating Temperature Range
OP176G . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40
°C to +85°C
Junction Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300
°C
Package Type
θ
JA
3
θ
JC
Units
8-Pin Plastic DIP (P)
103
43
°C/W
8-Pin SOIC (S)
158
43
°C/W
NOTES
1Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2For input voltages greater than
±7.5 V limit input current to less than 5 mA.
3
θ
JA is specified for the worst case conditions, i.e., θJA is specified for device in socket
for P-DIP packages;
θ
JA is specified for device soldered in circuit board for SOIC
package.
(@ V
S = ± 15.0 V, TA = +25°C unless otherwise noted)
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP176 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
Parameter
Symbol
Conditions
Limit
Units
Offset Voltage
V
OS
1
mV max
Input Bias Current
I
B
V
CM = 0 V
350
nA max
Input Offset Current
I
OS
V
CM = 0 V
±50
nA max
Input Voltage Range
1
V
CM
±10.5
V min
Common-Mode Rejection
CMRR
V
CM = ± 10.5 V
80
dB min
Power Supply Rejection Ratio
PSRR
V =
±4.5 V to ±18 V
86
dB min
Large Signal Voltage Gain
A
VO
R
L = 2 kΩ
250
V/mV min
Output Voltage Range
V
O
R
L = 2 kΩ
13.5
V min
V
S = ± 18.0 V, RL = 600 Ω
14.8
V min
Supply Current
I
SY
V
S = ± 22.0 V, VO = 0 V, RL = ∞
2.75
mA max
V
S = ± 4.5 V to ± 18 V,
2.5
mA max
V
O = 0 V, RL = ∞
NOTES
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
1Guaranteed by CMR test.
OP176 Die Size 0.069
× 0.067 Inch, 4,623 Sq. Mils.
Substrate (Die Backside) Is Connected to V–.
Transistor Count, 26.
WAFER TEST LIMITS
NULL
V+
OUT
NULL
–IN
+IN
V
DICE CHARACTERISTICS
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
OP176GP
–40
°C to +85°C
8-Pin Plastic DIP
N-8
OP176GS
–40
°C to +85°C
8-Pin SOIC
SO-8
OP176GSR
–40
°C to +85°C
SO-8 Reel, 2500 Pieces
OP176GBC
+25
°C
DICE


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