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74ABT899CMSA Arkusz danych(PDF) 9 Page - Fairchild Semiconductor

Numer części 74ABT899CMSA
Szczegółowy opis  9-Bit Latchable Transceiver with Parity Generator/Checker
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Producent  FAIRCHILD [Fairchild Semiconductor]
Strona internetowa  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74ABT899CMSA Arkusz danych(HTML) 9 Page - Fairchild Semiconductor

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Skew
(PLCC package)
(Note 2)
Note 19: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.).
Note 20: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 21: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH to LOW (tOSHL), LOW to HIGH (tOSLH), or any combination switching LOW to HIGH and/or HIGH to
LOW (tOST). This specification is guaranteed but not tested. Skew applies to propagation delays individually; i.e., An to Bn separate from LEA to An.
Note 22: This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Note 23: Propagation delay variation for a given set of conditions (i.e., temperature and VCC) from device to device. This specification is guaranteed but not
tested.
Capacitance
Note 24: CI/O is measured at frequency, f = 1 MHz, per MIL-STD-883B, Method 3012.
Symbol
Parameter
TA = −40°C to +85°CTA = −40°C to +85°C
Units
VCC = 4.5V–5.5V
VCC = 4.5V–5.5V
CL = 50 pF
CL = 250 pF
9 Outputs Switching
9 Outputs Switching
(Note 19)
(Note 20)
Max
Max
tOSHL
Pin to Pin Skew
1.0
2.0
ns
(Note 21)
HL Transitions
tOSLH
Pin to Pin Skew
1.1
2.1
ns
(Note 21)
LH Transitions
tPS
Duty Cycle
2.0
3.5
ns
(Note 22)
LH–HL Skew
tOST
Pin to Pin Skew
2.0
3.5
ns
(Note 21)
LH/HL Transitions
tPV
Device to Device Skew
3.0
4.0
ns
(Note 23)
LH/HL Transitions
Symbol
Parameter
Typ
Units
Conditions
TA = 25°C
CIN
Input Pin Capacitance
5.0
pF
VCC = 0V
CI/O (Note 24)
Output Capacitance
11.0
pF
VCC = 5.0V


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