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ISLA216P20 Arkusz danych(PDF) 11 Page - Intersil Corporation |
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ISLA216P20 Arkusz danych(HTML) 11 Page - Intersil Corporation |
11 / 25 page Application Note 1837 11 AN1837.0 May 3, 2013 COMBINED FFT PERFORMANCE FOR THE INPUT INTERFACE CIRCUIT AND THE ADC The starting point for the dynamic range of the ISLA214P50-55210EV1Z board would be the reported performance of the ADC only in its typical 2-transformer input evaluation board circuit. The typical ADC only EVM is described here: http://www.intersil.com/content/dam/Intersil/documents/isla/ isla214ir72ev1z_schem_layers.pdf While the ISLA214P50 data sheet is available here: http://www.intersil.com/content/dam/Intersil/documents/fn75 /fn7571.pdf The SNR shown in Figure 2 from the ADC data sheet (and repeated here) is actually SNRFS. Combining the information in these plots along with the specification table suggests the following typical numbers for the ADC only up through 100MHz inputs: 1. SNRFS ≈ 72.6dB 2. SFDR ≈ 82dBc to 84dBc 3. HD2 ≈< -84dBc 4. HD3 ≈< -80dBc The SNRFS will certainly drop from this 72.6dB by some amount due to the added integrated noise presented to its inputs over a simple transformer input test. The HD2 and HD3 will show a complex result when combined with the ADC where that testing will be done here at -2dBFS. Recognizing that the midrange input frequencies will get little interstage filter help on the HD2 and HD3 terms, the 40MHz FFT of Figure 16 is showing that the intrinsic dynamic range up to the FDA outputs is so good as to produce almost no degradation in ADC only operation. For this 283mVP-P single tone input at 40.07MHz that is bandpass filtered and delivered to the SMA input, the: 1. SNRFS has dropped from 72.6dBc to 71.9dBc 2. SFDR is bit better than typical at 89dBc vs the ADC only 82dBc to 84dBc 3. HD2 has improved to -89dBc from ADC only of approximately -85dBc 4. HD3 has improved to -93dBc from a typical -88dBc looking at Figure 15 at 40MHz Testing two boards for swept input frequency SNRFS gives the plot of Figure 17 where the result has dropped about 1dB from the ADC only data. The swept frequency HD2 performance actually improves slightly over the ADC only plots. This might be attributed to the -2dBFS target but certainly shows no degradation using the very high dynamic range input interface circuit implemented on this board. The swept frequency HD3 also seems slightly improved over the typical ADC only plots. These plots are showing some degradation in SNRFS, and a slight improvement on the HD2 and HD3 performance. Here, however, the -2dBFS input level is only 283mVP-P at board edge vs a much higher level for the typical ADC characterization circuit. The harmonic distortion performance is the combined result of many elements in the design. Hence, it is very difficult to make too strong a claim on the worst case distortion. The limited testing here seems to indicate a <-80dBc performance is certainly being delivered where even <-85dBc seems possible. While the signal path circuit here may seem a bit involved, it is converting from single ended input and delivering a bandlimited response to the ADC with precise common mode control and exceptionally low noise and distortion using <120mW total. Since the FFT’s are showing nearly as good performance as the ADC itself, this solution is equivalent to a 14-bit, 500MSPS ADC requiring only 300mVP-P single ended input for -1dBFS. FIGURE 14. SNRFS AND SFDR vs FIN USING 500MSPS CLOCK AND TARGETING -1dBFS And then the swept frequency on just those HD2 and HD3 terms from Figure 3 in the ISLA214P50 data sheet. FIGURE 15. HD2 AND HD3 vs FIN USING 500MSPS CLOCK AND TARGETING -1dBFS 55 60 65 70 75 80 85 90 95 0 100 200 300 400 500 600 SFDR SNR SFDR (EXCLUDING H2, H3) INPUT FREQUENCY (MHz) -95 -90 -85 -80 -75 -70 -65 -60 -55 0 100 200 300 400 500 600 HD2 HD3 INPUT FREQUENCY (MHz) |
Podobny numer części - ISLA216P20 |
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Podobny opis - ISLA216P20 |
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