Zakładka z wyszukiwarką danych komponentów |
|
AD5251BRUZ10 Arkusz danych(PDF) 7 Page - Analog Devices |
|
AD5251BRUZ10 Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 28 page Data Sheet AD5251/AD5252 Rev. D | Page 7 of 28 INTERFACE TIMING CHARACTERISTICS All input control voltages are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. Switching characteristics are measured using both VDD = 3 V and 5 V. Table 3. Interface Timing and EEMEM Reliability Characteristics (All Parts)1 Parameter Symbol Conditions Min Typ Max Unit INTERFACE TIMING SCL Clock Frequency f SCL 400 kHz t BUF Bus-Free Time Between Stop and Start t 1 1.3 µs t HD;STA Hold Time (Repeated Start) t 2 After this period, the first clock pulse is generated. 0.6 µs t LOW Low Period of SCL Clock t 3 1.3 µs t HIGH High Period of SCL Clock t 4 0.6 µs t SU;STA Set-up Time for Start Condition t 5 0.6 µs t HD;DAT Data Hold Time t 6 0 0.9 µs t SU;DAT Data Set-up Time t 7 100 ns t F Fall Time of Both SDA and SCL Signals t 8 300 ns t R Rise Time of Both SDA and SCL Signals t 9 300 ns t SU;STO Set-up Time for Stop Condition t 10 0.6 µs EEMEM Data Storing Time t EEMEM_STORE 26 ms EEMEM Data Restoring Time at Power-On2 t EEMEM_RESTORE1 V DD rise time dependent. Measure without decoupling capacitors at V DD and V SS. 300 µs EEMEM Data Restoring Time upon Restore Command or Reset Operation2 t EEMEM_RESTORE2 V DD = 5 V. 300 µs EEMEM Data Rewritable Time (Delay Time After Power-On or Reset Before EEMEM Can Be Written) t EEMEM_REWRITE 540 µs FLASH/EE MEMORY RELIABILITY Endurance3 100 k cycles Data Retention4 100 Years 1 Guaranteed by design; not subject to production test. See Figure 23 for location of measured values. 2 During power-up, all outputs are preset to midscale before restoring the EEMEM contents. RDAC0 has the shortest EEMEM data restoring time, whereas RDAC3 has the longest. 3 Endurance is qualified to 100,000 cycles per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, and +105°C; typical endurance at +25°C is 700,000 cycles. 4 Retention lifetime equivalent at junction temperature T J = 55°C per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6 eV derates with junction temperature in Flash/EE memory. |
Podobny numer części - AD5251BRUZ10 |
|
Podobny opis - AD5251BRUZ10 |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |