AD5621AKSZ-REEL7 datasheet(4/24 Pages) AD

Numer części	AD5621AKSZ-REEL7

Szczegółowy opis	2.7 V to 5.5 V, <100 關A, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70

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Producent	AD [Analog Devices]

Strona internetowa	http://www.analog.com

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4 / 24 page

AD5601/AD5611/AD5621

Data Sheet

Rev. G | Page 4 of 24

A Grade

B Grade

Parameter

Min

Typ

Max

Min

Typ

Max

Unit

Test Conditions/Comments

POWER REQUIREMENTS

VDD

2.7

5.5

2.7

5.5

V

All digital inputs at 0 V or VDD

IDD for Normal Mode

DAC active and excluding load

current

VDD = ±4.5 V to ±5.5 V

75

100

75

100

µA

VIH = VDD and VIL = GND

VDD = ±2.7 V to ±3.6 V

60

90

60

90

µA

VIH = VDD and VIL = GND

IDD for All Power-Down Modes

VIH = VDD and VIL = GND

VDD = ±4.5 V to ±5.5 V

0.5

µA

VIH = VDD and VIL = GND

VDD = ±2.7 V to ±3.6 V

0.2

µA

VIH = VDD and VIL = GND

POWER EFFICIENCY

IOUT/IDD

96

%

ILOAD = 2 mA and VDD = ±5 V

1

Linearity calculated using a reduced code range: AD5621 from Code 64 to Code 4032; AD5611 from Code 16 to Code 1008; AD5601 from Code 4 to Code 252.

2

Guaranteed by design and characterization, not production tested.

3

Total current flowing into all pins.

TIMING CHARACTERISTICS

VDD = 2.7 V to 5.5 V; all specifications TMIN to TMAX, unless otherwise noted. See Figure 2.

Table 3.

Parameter

Limit1

Unit

Test Conditions/Comments

t12

33

ns min

SCLK cycle time

t2

5

ns min

SCLK high time

t3

5

ns min

SCLK low time

t4

10

ns min

SYNC to SCLK falling edge setup time

t5

5

ns min

Data setup time

t6

4.5

ns min

Data hold time

t7

0

ns min

SCLK falling edge to SYNC rising edge

t8

20

ns min

Minimum SYNC high time

t9

13

ns min

SYNC rising edge to next SCLK falling edge ignored

1

All input signals are specified with tr = tf = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.

2

Maximum SCLK frequency is 30 MHz.

Figure 2. Timing Diagram

t4

t3

t2

t5

t7

t6

D0

D1

D2

D14

D15

SYNC

SCLK

t9

t1

t8

D15

D14

SDIN

Podobny numer części - AD5621AKSZ-REEL7

Producent	Numer części	Arkusz danych	Szczegółowy opis
Analog Devices	AD5621AKSZ-REEL7	541Kb / 24P	2.7 V to 5.5 V, <100 關A, 8-/10-/12-Bit nanoDAC Rev. F
Analog Devices	AD5621AKSZ-REEL7	577Kb / 21P	8-/10-/12-Bit nanoDAC, SPI Interface

More results

Podobny opis - AD5621AKSZ-REEL7

Producent	Numer części	Arkusz danych	Szczegółowy opis
Analog Devices	AD5621AKSZ	466Kb / 24P	2.7 V to 5.5 V, <100 關A, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70 Rev. G
	AD5611	466Kb / 24P	2.7 V to 5.5 V, 100 A, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70 Rev. G
	AD5621	466Kb / 24P	2.7 V to 5.5 V, 100 A, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70 Rev. G
	AD5601	466Kb / 24P	2.7 V to 5.5 V, 100 A, 8-/10-/12-Bit nanoDAC, SPI Interface in LFCSP and SC70 Rev. G
	AD5601	599Kb / 20P	2.7 V to 5.5 V, <100 UA, 8-/10-/12-Bit nanoDAC D/A, SPI Interface, SC70 Package Rev. PrC
	AD5601	541Kb / 24P	2.7 V to 5.5 V, <100 關A, 8-/10-/12-Bit nanoDAC Rev. F
	AD5641	572Kb / 20P	2.7 V to 5.5 V, <100 uA, 14-Bit nanoDAC D/A in SC70 Package Rev. PrC
	AD5061	451Kb / 20P	16-Bit VOUT nanoDAC SPI Interface 2.7 V to 5.5 V, in an SOT-23 REV. B
	AD5641BKSZ	504Kb / 20P	SPI Interface in LFCSP and SC70 REV. D
	AD5063	350Kb / 20P	Fully Accurate 16-Bit VOUT nanoDAC SPI Interface 2.7 V to 5.5 V in an MSOP REV. C

More results

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