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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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LM49370RLX-NOPB Arkusz danych(PDF) 9 Page - Texas Instruments |
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LM49370RLX-NOPB Arkusz danych(HTML) 9 Page - Texas Instruments |
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9 / 89 page  LM49370 www.ti.com SNAS356D – FEBRUARY 2007 – REVISED MARCH 2012 Electrical Characteristics (1)(2) (continued) Unless otherwise stated PLL_VDD = 3.3V, D_VDD = 3.3V, BB_VDD = 1.8V, A_VDD = 3.3V, LS_VDD = 3.3V. The following specifications apply for the circuit shown in Figure 2 unless otherwise stated. Limits apply for 25°C. LM49370 Symbol Parameter Conditions Units Limit(4) Typical(3) (5) CP_OUT AMPLIFIER THD+N Total Harmonic Distortion + Noise VO = 1VRMS, 5kΩ load 0.02 % CBYPASS = 1.0μF PSRR Power Supply Rejection Ratio VRIPPLE = 200mVPP 86 dB fRIPPLE = 217Hz MONO ADC RADC ADC Ripple ±0.25 dB ADC Passband Lower (HPF Mode 1), fS = 8 kHz 300 Hz PBADC Upper 3470 Hz Above Passband 60 dB SBAADC ADC Stopband Attenuation HPF Notch, 50 Hz/60 Hz (worst case) 58 dB SNRADC ADC Signal to Noise Ratio From CPI, A-weighted 90 dB ADCLEVEL ADC Full Scale Input Level 1 VRMS STEREO DAC RDAC DAC Ripple 0.1 dB PBDAC DAC Passband 20 kHz SBADAC DAC Stopband Attenuation 70 dB SNRDAC DAC Signal to Noise Ratio A-weighted, AUXOUT 85 dB DRDAC DAC Dynamic Range 96 dB DACLEVEL DAC Full Scale Output Level 1 VRMS PLL(8) Min 0.5 MHz FIN Input Frequency Range Max 30 MHz I2S/PCM fS = 48kHz; 16 bit mode 1.536 MHz fS = 48kHz; 25 bit mode 2.4 MHz fI2SCLK I2S CLK Frequency fS = 8kHz; 16 bit mode 0.256 MHz fS = 8kHz; 25 bit mode 0.4 MHz fS = 48kHz; 16 bit mode 0.768 MHz fS = 48kHz; 25 bit mode 1.2 MHz fPCMCLK PCM CLK Frequency fS = 8kHz; 16 bit mode 0.128 MHz fS = 8kHz; 25 bit mode 0.2 MHz Min 40 % (min) DCI2S_CLK I2S_CLK Duty Cycle Max 60 % (max) DCI2S_WS I2S_WS Duty Cycle 50 % I2C TI2CSET I2C Data Setup Time Refer to TRANSFERRING DATA for more 100 ns (min) details TI2CHOLD I2C Data Hold Time Refer to TRANSFERRING DATA for more 300 ns (min) details SPI TSPISETENB Enable Setup Time 100 ns (min) TSPIHOLD-ENB Enable Hold Time 100 ns (min) TSPISETD Data Setup Time 100 ns (min) (8) Disabling or bypassing the PLL will usually result in an improvement in noise measurements. Copyright © 2007–2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: LM49370 |
Podobny numer części - LM49370RLX-NOPB |
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Podobny opis - LM49370RLX-NOPB |
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