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AD9122 Arkusz danych(PDF) 6 Page - Analog Devices

Numer części AD9122
Szczegółowy opis  Interfacing the ADL5375 I/Q Modulator to the AD9122 Dual Channel, 1.2 GSPS High Speed DAC
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AD9122 Arkusz danych(HTML) 6 Page - Analog Devices

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CN-0205
Circuit Note
Rev. 0 | Page 6 of 9
AD9122
LC FILTER
IOUT_P
R1
R1
R2
R2
A
A
B
B
IOUT_N
ADL5375-15
REQUIRED DC LEVEL
B = 1.5V
R3
R4
R3
V1
Figure13. Recommended Passive Level-Shifting Network with LC Filter
The differential source impedance and load impedance of the
filter are
2 × (R1 + R2) and
2 × {R3||(R4/2)}, respectively.
The single-ended impedance seen by DAC is
R1||{R2+R3||(R4/2)}.
R4 acts as the ac load to the DAC. The differential ac swing at
DAC output is
2 × IFS × R1||{R2+R3||(R4/2)},
and the differential ac swing at the modulator input is
2 × {R3||(R4/2)}÷{R2+(R3||(R4/2)}
multiplied by the differential ac swing at DAC output.
34.0
218
760
750
20
5.00
31.70
0.50
0.63
1.50
0.34
–5.43
504
502
SETUP
R1 (Ω)
R2 (Ω)
R3(Ω)
R4 (Ω)
IFS (MA)
V1 (V)
DAC R
(SINGLE)
FILTER
INPUT IMPEDANCE (Ω)
OUTPUT IMPEDANCE (Ω)
DAC
DAC
COMMON VOLTAGE (V)
DAC SWING (V p_p)
(SINGLE)
MOD
MODULATOR
COMMON VOLTAGE (V)
MOD INPUT SWING
(V p_p)
(SINGLE)
LOSS BY R2 (DB)
Figure14. Spreadsheet for the Level Shifting Circuit
The LC filter should be placed close to the DAC to allow short
return current path. The 5 V bias supply (V1) should be close
to the modulator because it is shared with the modulator. For
the case when R1, R2, R3, and R4 are 34 Ω, 218 Ω, 760 Ω, and
750 Ω, respectively, the 500 mV dc bias at the AD9122 DAC
output is matched to the 1500 mV dc bias at ADL5375-15.
Actually, it is not necessary to be 500 mV at point A of Figure
13, but it will give flexibility in the ac swing level without
exceeding the compliance voltage of the DAC output. The DAC
load is 31.7 Ω. The input and output impedance of the filter are
504 Ω and 502 Ω. The attenuation by R2, which is the voltage
drop by R2 between the DAC output and modulator input, is
set by the combination of R2 and R3||(R4/2),which is about 5.4 dB.
To calculate dc bias level and ac swing level at the A and B
points (Figure 13), attenuation by R2, and source/load
impedances of the filter, the spreadsheet below can be used.
This can be downloaded at the following URL:
www.analog.com/CN0205-LevelShifter.
The ADIsimRF tool can also be used to perform DAC-
modulator power level calculations. The tool can be
downloaded from www.analog.com/ADIsimRF.
Layout Recommendations
Special care should be taken in the layout of the
DAC/modulator interface. Here are some recommendations.
Figure 15 shows a top-level layout, which follows these
recommendations:
Keep all I/Q differential trace lengths well matched.
Place filter termination resistor as close as possible to
modulator input.
Place DAC output 50 Ω resistors as close as possible to
DAC.
Thicken trace widths through the filter network to
reduce signal loss.
Place vias around all DAC output traces, filter
networks, modulator output traces, and LO input
traces.
Route LO and modulator outputs on different layers
or at 90° angle to each other to prevent coupling.
Figure15. General Layout Recommendations


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