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AD9122 Arkusz danych(PDF) 4 Page - Analog Devices |
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AD9122 Arkusz danych(HTML) 4 Page - Analog Devices |
4 / 8 page CN-0243 Circuit Note Rev. 0 | Page 4 of 8 4. To achieve optimal performance from the filter, these traces should be 100 Ω differential, or 50 Ω per line. Note that with typical FR4 material, a 50 Ω line results from a T/W ratio of 2:1. If higher impedance lines are desired it should be understood that the impedance of the line is a nonlinear function of T/W (T = board layer thickness, W = width of trace). A thinner line results in a higher impedance line. With typical FR4 layer thicknesses, a 100 Ω line can get very thin, often close to minimum design constraints. One solution to this is to void the ground layer underneath the trace and put another ground layer on the third layer of the PCB. This effectively doubles T and allows for a wider trace. DAC_MOD Interface Filter Topology Figure 5 shows a typical topology which gives a 5th order maximally flat Butterworth response for a differential input and output impedance of 100 Ω.. The actual response is given in Figure 6. This filter uses 4.6 pF capacitors at the source and load. This magnitude of capacitor value (<20 pF) is typical of filters with high cutoff frequencies. Parasitics may have a significant effect on response when using these small capacitor values. L L1 L = 58.5nH R = 1pΩ PORT IP_BB NUM = 1 PORT IN_BB NUM = 3 PORT IP_MOD NUM = 2 PORT IN_MOD NUM = 4 C C1 C = 4.46893pF C C2 C = 14.461762pF C C3 C = 4.46893pF L L2 L = 58.5nH R = 1pΩ L L3 L = 58.5nH R = 1pΩ L L4 L = 58.51nH R = 1pΩ Figure 5. DAC/Mod Interface Filter Topology, 5th Order Butterworth, 3 dB BW = 220 MHz, 100 Ω Differential Input and Output Impedance 0 –70 –60 –50 –40 –30 –20 –10 0 0.2 0.4 0.6 0.8 1.0 FREQUENCY (GHz) S1 SPC Figure 6. Frequency Response of Filter Topology Given in Figure 5 DAC and Distortion Related Spurious Components The use of DAC interpolation filters by themselves can reduce the spurious content at the modulator input and, therefore, the spurious content at RF. However, there may still be significant spurious content. Figure 7 shows the RF output spectrum of the IQ modulator under the following conditions; FLO = 1940 MHz DAC input data rate = 300 MSPS DAC interpolation = 4× DAC NCO frequency = 150 MHz DAC input IF frequency = 8 MHz Note that the strongest spurious component (aside from the fundamental at 2098 MHz) is the 2× component of the DAC clock at 2400 MHz. This is likely a result of common and differential mode components of the DAC output containing some spectrum from the DAC clock. The common-mode rejection of the IQ modulator input rejects much of this signal, but it is still contains significant energy. The next two highest spurs, at 2062 MHz and at 2242 MHz, also seem to be related to DAC clock spurs. The spur at 2242 MHz is easily recognized as 2 × (DAC clock – DAC fundamental) = 2400 − 158. The spur at 2062 MHz is not so obvious, but looks like (3 × LO) − (3 × DAC clock) − 158 = 5820 − 3600 − 158. If the analysis is correct, then we should be able to see significant spur reduction if we can suppress the common-mode component of the DAC clock at the IQ modulator inputs. 2098MHz 2400MHz 2242MHz 2062MHz Figure 7. IQ Modulator RF Output with DAC/IQ Mod Filter Absent, LO = 1940 MHz, DAC Input IF = 8 MHz, DAC NCO = 150 MHz, RF = 2098 MHz |
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