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TLP715 Arkusz danych(PDF) 5 Page - Toshiba Semiconductor |
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TLP715 Arkusz danych(HTML) 5 Page - Toshiba Semiconductor |
5 / 9 page TLP715 2012-12-19 5 TEST CIRCUIT 7: Switching Time Test Circuit TEST CIRCUIT 8: Switching Time Test Circuit TEST CIRCUIT 9: Common-Mode Transient Immunity Test Circuit CMH (CML) is the maximum rate of rise (fall) of the common mode voltage that can be sustained with the output voltage in the high (low) state. 0.1μF Vo Vcc 1 3 6 5 4 VCM B Vcc GND SHIELD 2 SW A → IF + - Vo 0.1μF Vcc IF Vcc GND SHIELD CL Vcc GND SHIELD Vo 0.1μF CL Vcc IF 5V 620Ω 5kΩ CL: stray capacitance of probe and wiring (to 15 pF) IF=3 mA(P.G) (f=50 kHz , duty=50% less than tr = tf = 5ns ) CL: stray capacitance of probe and wiring (to 15 pF) tp LH IF Vo 50% VOL VOH tp HL tr tf 90% 10% 1.3V 1.3V 10% 90% tp LH IF Vo 50% VOL VOH tp HL 1.3V 1.3V ) s ( tr ) V ( L CM μ = 800 ) s ( tf ) V ( H CM μ − = 800 CML CMH VCM Vo 90% 1000V ・ SW A : I F =5mA ・ SW B : I F =0mA 1V 17V tr tf 10% IF=3 mA(P.G) (f=50 kHz , duty=50% less than tr = tf = 5ns ) |
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