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ADM1069ACPZ-REEL7 Arkusz danych(PDF) 4 Page - Analog Devices

Numer części ADM1069ACPZ-REEL7
Szczegółowy opis  Super Sequencer with Margining Control
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ADM1069
Rev. C | Page 4 of 32
SPECIFICATIONS
VH = 3.0 V to 14.4 V,1 VPx = 3.0 V to 6.0 V,1 TA = −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
POWER SUPPLY ARBITRATION
VH, VPx
3.0
V
Minimum supply required on one of VH, VPx
VPx
6.0
V
Maximum VDDCAP = 5.1 V, typical
VH
14.4
V
VDDCAP = 4.75 V
VDDCAP
2.7
4.75
5.4
V
Regulated LDO output
CVDDCAP
10
μF
Minimum recommended decoupling
capacitance
POWER SUPPLY
Supply Current, IVH, IVPx
4.2
6
mA
VDDCAP = 4.75 V, PDO1 to PDO8 off, DACs off,
ADC off
Additional Currents
All PDO FET Drivers On
1
mA
VDDCAP = 4.75 V, PDO1 to PDO6 loaded with
1 μA each, PDO7 to PDO8 off
Current Available from VDDCAP
2
mA
Maximum additional load that can be drawn
from all PDO pull-ups to VDDCAP
DAC Supply Currents
2.2
mA
Four DACs on with 100 μA maximum load on each
ADC Supply Current
1
mA
Running round-robin loop
EEPROM Erase Current
10
mA
1 ms duration only, VDDCAP = 3 V
SUPPLY FAULT DETECTORS
VH Pin
Input Impedance
52
Input Attenuator Error
±0.05
%
Midrange and high range
Detection Ranges
High Range
6
14.4
V
Midrange
2.5
6
V
VPx Pins
Input Impedance
52
Input Attenuator Error
±0.05
%
Low range and midrange
Detection Ranges
Midrange
2.5
6
V
Low Range
1.25
3
V
Ultralow Range
0.573
1.375
V
No input attenuation error
VXx Pins
Input Impedance
1
Detection Ranges
Ultralow Range
0.573
1.375
V
No input attenuation error
Absolute Accuracy
±1
%
VREF error + DAC nonlinearity + comparator
offset error
Threshold Resolution
8
Bits
Digital Glitch Filter
0
μs
Minimum programmable filter length
100
μs
Maximum programmable filter length


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