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TPA3106D1EVM Arkusz danych(PDF) 5 Page - Texas Instruments |
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TPA3106D1EVM Arkusz danych(HTML) 5 Page - Texas Instruments |
5 / 36 page 32-PINHTQFP (VFP) (TOP VIEW) TPA3106D1 www.ti.com SLOS516C – OCTOBER 2007 – REVISED AUGUST 2010 TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. Active low. Shutdown signal for IC (LOW = disabled, HIGH = operational). TTL logic levels with SHUTDOWN 29 I compliance to AVCC. INP 1 I Positive audio input INN 2 I Negative audio input GAIN0 5 I Gain select least significant bit. TTL logic levels with compliance to VREG. GAIN1 6 I Gain select most significant bit. TTL logic levels with compliance to VREG. Active high. Mute signal for quick disable/enable of outputs (HIGH = outputs high-Z, LOW = outputs MUTE 30 I enabled). TTL logic levels with compliance to AVCC. TTL compatible output. HIGH = short-circuit fault. LOW = no fault. Only reports short-circuit faults. FAULT 31 O Thermal faults are not reported on this terminal. BSP 23 I/O Bootstrap I/O for left channel, positive high-side FET. 14, 15, PVCC Power supply for left channel H-bridge, not internally connected to AVCC. 26–28 OUTP 21, 22 O Class-D 1/2-H-bridge positive output 16, 17, PGND Power ground for H-bridge. 24, 25 OUTN 19, 20 O Class-D 1/2-H-bridge negative output BSN 18 I/O Bootstrap I/O for left channel, negative high-side FET. VCLAMP 13 Internally generated voltage supply forbootstrap capacitor. AGND 3, 4, 12 Analog ground for digital/analog cells in core. ROSC 9 I/O I/O for current setting resistor of ramp generator. Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TPA3106D1 |
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