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M74VHC1GT00DTT1G Arkusz danych(PDF) 3 Page - ON Semiconductor

Numer części M74VHC1GT00DTT1G
Szczegółowy opis  Single 2-Input NAND Gate CMOS Logic Level Shifter
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Producent  ONSEMI [ON Semiconductor]
Strona internetowa  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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MC74VHC1GT00
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3
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
VCC
(V)
TA = 25°C
TA ≤ 85°C
−55 ≤ TA ≤ 125°C
Unit
Min
Typ
Max
Min
Max
Min
Max
VIH
Minimum High−Level
Input Voltage
3.0
4.5
5.5
1.4
2.0
2.0
1.4
2.0
2.0
1.4
2.0
2.0
V
VIL
Maximum Low−Level
Input Voltage
3.0
4.5
5.5
0.53
0.8
0.8
0.53
0.8
0.8
0.53
0.8
0.8
V
VOH
Minimum High−Level
Output Voltage
VIN = VIH or VIL
VIN = VIH or VIL
IOH = −50 mA
3.0
4.5
2.9
4.4
3.0
4.5
2.9
4.4
2.9
4.4
V
VIN = VIH or VIL
IOH = −4 mA
IOH = −8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
VOL
Maximum Low−Level
Output Voltage
VIN = VIH or VIL
VIN = VIH or VIL
IOL = 50 mA
3.0
4.5
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
V
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
IIN
Maximum Input
Leakage Current
VIN = 5.5 V or GND
0 to
5.5
±0.1
±1.0
±1.0
mA
ICC
Maximum Quiescent
Supply Current
VIN = VCC or GND
5.5
1.0
20
40
mA
ICCT
Quiescent Supply
Current
Input: VIN = 3.4 V
5.5
1.35
1.50
1.65
mA
IOFF
Power Off Output
Leakage Current
VOUT = 5.5 V
0.0
0.5
5.0
10
mA
AC ELECTRICAL CHARACTERISTICS Input tr = tf = 3.0 ns
Symbol
Parameter
Test Conditions
TA = 25°C
TA ≤ 85°C
−55 ≤ TA ≤ 125°C
Unit
Min
Typ
Max
Min
Max
Min
Max
tPLH,
tPHL
Maximum Propagation
Delay, Input A or B to Y
VCC = 3.3 ± 0.3 V CL = 15 pF
CL = 50 pF
4.1
5.5
10.0
13.5
11.0
15.0
13.0
17.5
ns
VCC = 5.0 ± 0.5 V CL = 15 pF
CL = 50 pF
3.1
3.6
6.9
7.9
8.0
9.0
9.5
10.5
CIN
Maximum Input
Capacitance
5.5
10
10
10
pF
CPD
Power Dissipation Capacitance (Note 6)
Typical @ 25°C, VCC = 5.0 V
pF
11
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD  VCC2  fin + ICC  VCC.


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