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AD7226BQ Arkusz danych(PDF) 9 Page - Analog Devices

Numer części AD7226BQ
Szczegółowy opis  LC2MOS Quad 8-Bit D/A Converter
Download  16 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD7226BQ Arkusz danych(HTML) 9 Page - Analog Devices

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REV.
AD7226
–9–
DAC A
DAC B
DAC C
DAC D
MSB
VREF
VDD
DGND
AGND
VSS
VOUTA
WR
A1
A0
LSB
VOUTB
VOUTC
VOUTD
DB7
DB0
Figure 8. AD7226 Unipolar Output Circuit
Table II. Unipolar Code Table
DAC Latch Contents
MSB
LSB
Analog Output
1 1 1 1
1 1 1 1
+
Ê
ËÁ
ˆ
¯˜
VREF
255
256
1 0 0 0
0 0 0 1
+
Ê
ËÁ
ˆ
¯˜
VREF
129
256
1 0 0 0
0 0 0 0
+
Ê
ËÁ
ˆ
¯˜ =+
V
V
REF
REF
128
256
2
0 1 1 1
1 1 1 1
+
Ê
ËÁ
ˆ
¯˜
VREF
127
256
0 0 0 0
0 0 0 1
+
Ê
ËÁ
ˆ
¯˜
VREF
1
256
0 0 0 0
0 0 0 0
0 V
Note LSB
V
V
REF
REF
:
=
()
()= Ê
ËÁ
ˆ
¯˜
2
1
256
8
(2)
Bipolar Output Operation
Each of the DACs of the AD7226 can be individually config-
ured to provide bipolar output operation. This is possible using
one external amplifier and two resistors per channel. Figure 9
shows a circuit used to implement offset binary coding (bipolar
operation) with DAC A of the AD7226. In this case
V
R
R
DV
R
R
V
OUT
A
REF
REF
=+
Ê
ËÁ
ˆ
¯˜
¥
() Ê
ËÁ
ˆ
¯˜
¥
()
1
2
1
2
1
(3)
With R1 = R2
VD
V
OUT
A
REF
=
()¥
21
(4)
where DA is a fractional representation of the digital word in latch A.
Mismatch between R1 and R2 causes gain and offset errors and
therefore these resistors must match and track over tempera-
ture. Once again the AD7226 can be operated in single supply
or from positive/negative supplies. Table III shows the digital
code versus output voltage relationship for the circuit of Figure 9
with R1 = R2.
DAC A
VREF
VDD
DGND
AGND
VSS
VOUTA
VOUT
VREF
AD7226*
R2
R1
+15V
–15V
R1, R2 = 10k
0.1%
*DIGITAL INPUTS OMITTED
FOR CLARITY
Figure 9. AD7226 Bipolar Output Circuit
Table III. Bipolar (Offset Binary) Code Table
DAC Latch Contents
MSB
LSB
Analog Output
1 1 1 1
1 1 1 1
+
Ê
ËÁ
ˆ
¯˜
VREF
127
128
1 0 0 0
0 0 0 1
+
Ê
ËÁ
ˆ
¯˜
VREF
1
128
1 0 0 0
0 0 0 0
0 V
0 1 1 1
1 1 1 1
–VREF
1
128
Ê
ËÁ
ˆ
¯˜
0 0 0 0
0 0 0 1
–VREF
127
128
Ê
ËÁ
ˆ
¯˜
0 0 0 0
0 0 0 0
––
VV
REF
REF
128
128
Ê
ËÁ
ˆ
¯˜ =
AGND BIAS
The AD7226 AGND pin can be biased above system GND
(AD7226 DGND) to provide an offset “zero” analog output
voltage level. Figure 10 shows a circuit configuration to achieve
this for channel A of the AD7226. The output voltage, VOUTA,
can be expressed as:
VA
V
D V
OUT
BIAS
A
IN
=+
()
(5)
where DA is a fractional representation of the digital input word
(0
£ D £ 255/256).
D


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