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AD9139BCPZ Arkusz danych(PDF) 1 Page - Analog Devices |
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AD9139BCPZ Arkusz danych(HTML) 1 Page - Analog Devices |
1 / 56 page 16-Bit, 1600 MSPS, TxDAC+ Digital-to- Analog Converter Data Sheet AD9139 Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Selectable 1× or 2× interpolation filter Support input signal bandwidth up to 575 MHz Very small inherent latency variation: <2 DAC clock cycles Proprietary low spurious and distortion design 6-carrier GSM ACLR = 79 dBc at 200 MHz IF SFDR >85 dBc (bandwidth = 300 MHz) at zero IF Flexible 16-bit LVDS interface Supports word and byte load Multiple chip synchronization Fixed latency and data generator latency compensation FIFO eases system timing and includes error detection High performance, low noise PLL clock multiplier Digital inverse sinc filter Low power: 700 mW at 1230 MSPS 72-lead LFCSP APPLICATIONS Wireless communications: 3G/4G and MC-GSM base stations, wideband repeaters, software defined radios Wideband communications: point-to-point, LMDS/MMDS Transmit diversity/MIMO Instrumentation Automated test equipment GENERAL DESCRIPTION The AD9139 is an 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a sample rate of 1600 MSPS, permitting a multicarrier generation up to the Nyquist frequency. The AD9139 TxDAC+® includes features optimized for wideband communication applications, including 1× and 2× interpolation, a delay locked loop (DLL) powered high speed interface, sample error detection, and parity detection. A 3-wire serial port interface provides for the programming/readback of many internal parameters. A full-scale output current can be programmed over a range of 9 mA up to 33 mA. The AD9139 is available in a 72-lead LFCSP. PRODUCT HIGHLIGHTS 1. 575 MHz achievable input signal bandwidth. 2. Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies. 3. Very small inherent latency variation simplifies both software and hardware design in the system. It allows easy multichip synchronization for most applications. 4. Low power architecture improves power efficiency. FUNCTIONAL BLOCK DIAGRAM Figure 1. REF AND BIAS FSADJ VREF POWER-ON RESET MULTICHIP SYNCHRONIZATION SERIAL INPUT/OUTPUT PORT PROGRAMMING REGISTERS DACCLKP DACCLKN REFP/SYNCP REFN/SYNCN CLOCK MULTIPLIER CLK RCVR REF RCVR DAC_CLK DLL 13-TAP D15P/D15N D0P/D0N FRAMEP/PARITYP FRAMEN/PARITYN DCIP/DCIN HB1 2× DAC 1 16-BIT DACOUTP DACOUTN 16 10 INTERNAL CLOCK TIMING AND CONTROL LOGIC DAC_CLK SYNC AD9139 |
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