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AD50601 Arkusz danych(PDF) 3 Page - Analog Devices |
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AD50601 Arkusz danych(HTML) 3 Page - Analog Devices |
3 / 24 page AD5066 Rev. A | Page 3 of 24 SPECIFICATIONS VDD = 2.7 V to 5.5 V, 2.0 V ≤ VREFA, VREFB, VREFC, VREFD ≤ VDD − 0.4 V, all specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter A Grade1 B Grade1 Unit Conditions/Comments Min Typ Max Min Typ Max STATIC PERFORMANCE2 Resolution 16 16 Bits Relative Accuracy (INL) ±0.5 ±4 ±0.5 ±1 LSB TA = −40°C to +105°C ±0.5 ±4 ±0.5 ±2 TA = −40°C to +125°C Differential Nonlinearity (DNL) ±0.2 ±1 ±0.2 ±1 LSB Total Unadjusted Error (TUE) ±0.1 ±0.8 ±0.1 ±0.8 mV VDD = 2.7 V, VREF = 2 V Zero-Code Error 0.05 0.1 0.05 0.1 mV All 0s loaded to the DAC register Zero-Code Error Drift3 ±0.5 ±0.5 µV/°C Full-Scale Error ±0.01 ±0.05 ±0.01 ±0.05 % FSR All 1s loaded to the DAC register Gain Error ±0.005 ±0.05 ±0.005 ±0.05 % FSR Gain Error Drift3 ±0.5 ±0.5 ppm ppm of FSR/°C DC Crosstalk3 1 5 1 5 μV Due to single-channel full-scale output change 5 25 5 25 μV Due to powering down (per channel) OUTPUT CHARACTERISTICS3 Output Voltage Range 0 VREF 0 VREF V DC Output Impedance (Normal Mode) 8 8 kΩ Output impedance tolerance ± 10% DC Output Impedance DAC in power-down mode Output Connected to 100 kΩ Network 100 100 kΩ Output impedance tolerance ± 20 kΩ Output Connected to 1 kΩ Network 1 1 kΩ Output impedance tolerance ± 400 Ω Power-Up Time4 2.9 2.9 µs DC PSRR −120 −120 dB VDD ± 10%, DAC = full scale REFERENCE INPUTS Reference Input Range 2 VDD− 0.4 2 VDD − 0.4 V Reference Current 0.002 ±1 0.002 ±1 µA Per DAC channel Reference Input Impedance 40 40 MΩ Per DAC channel LOGIC INPUTS3 Input Current5 ±1 ±1 µA Input Low Voltage, VINL 0.8 0.8 V Input High Voltage, VINH 2.2 2.2 V Pin Capacitance 4 4 pF POWER REQUIREMENTS VDD 2.7 5.5 2.7 5.5 V All digital inputs at 0 V or VDD DAC active, excludes load current IDD VIH = VDD and VIL = GND Normal Mode6 2.5 3 2.5 3 mA All Power-Down Modes7 0.4 0.4 µA 1 Temperature range is −40°C to +125°C, typical at 25°C. 2 Linearity calculated using a code range of 0 to 65,535; output unloaded. 3 Guaranteed by design and characterization; not production tested. 4 Time taken to exit power-down mode and enter normal mode, 32nd clock edge to 90% of DAC midscale value, output unloaded. 5 Current flowing into individual digital pins. VDD= 5.5 V; VREF= 4.096 V; Code = midscale. 6 Interface inactive. All DACs active. DAC outputs unloaded. 7 All four DACs powered down. |
Podobny numer części - AD50601 |
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Podobny opis - AD50601 |
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