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AD538SD Arkusz danych(PDF) 10 Page - Analog Devices

Numer części AD538SD
Szczegółowy opis  Real-Time Analog Computational Unit (ACU)
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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AD538SD Arkusz danych(HTML) 10 Page - Analog Devices

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AD538
Rev. E | Page 9 of 16
THEORY OF OPERATION
RE-EXAMINATION OF MULTIPLIER/DIVIDER ACCURACY
Traditionally, the accuracy (actually the errors) of analog
multipliers and dividers has been specified in terms of percent
of full scale. Thus specified, a 1% multiplier error with a 10 V
full-scale output would mean a worst-case error of +100 mV at
any level within its designated output range. While this type of
error specification is easy to test evaluate, and interpret, it can
leave the user guessing as to how useful the multiplier actually
is at low output levels, those approaching the specified error
limit (in this case) 100 mV.
The error sources of the AD538 do not follow the percent of
full-scale approach to specification, thus it more optimally
fits the needs of the very wide dynamic range applications
for which it is best suited. Rather than as a percent of full
scale, the AD538’s error as a multiplier or divider for a 100:1
(100 mV to 10 V) input range is specified as the sum of two
error components: a percent of reading (ideal output) term
plus a fixed output offset. Following this format, the AD538AD,
operating as a multiplier or divider with inputs down to 100 mV,
has a maximum error of ±1% of reading ±500 μV. Some sample
total error calculations for both grades over the 100:1 input
range are illustrated in Table 4. This error specification format
is a familiar one to designers and users of digital voltmeters
where error is specified as a percent of reading ± a certain
number of digits on the meter readout.
For operation as a multiplier or divider over a wider dynamic
range (>100:1), the AD538 has a more detailed error specification
that is the sum of three components: a percent of reading term,
an output offset term, and an input offset term for the VY/VX log
ratio section. A sample application of this specification, taken
from Table 4, for the AD538AD with VY = 1 V, VZ = 100 mV
and VX = 10 mV would yield a maximum error of ±2.0% of
reading ±500 μV ± (1 V + 100 mV)/10 mV × 250 μV or ±2.0%
of reading ±500 μV ± 27.5 mV. This example illustrates that
with very low level inputs the AD538’s incremental gain (VY +
VZ)/VX has increased to make the input offset contribution to
error substantial.
Table 4. Sample Error Calculation Chart (Worst Case)
VY
Input
(V)
VZ
Input
(V)
VX
Input
(V)
Ideal
Output
(V)
Total Offset Error
Term (mV)
% of Reading
Error Term
(mV)
Total Error
Summation
(mV)
Total Error
Summation as a
% of the Ideal
Output
100:1 INPUT
RANGE
Total Error =
±% rdg
±Output VOS
10
10
10
10
0.5
(AD)
100
(AD)
100.5
(AD)
1.0
(AD)
0.25
(BD)
50
(BD)
50.25
(BD)
0.5
(BD)
10
0.1
0.1
10
0.5
(AD)
100
(AD)
100.5
(AD)
1.0
(AD)
0.25
(BD)
50
(BD)
50.25
(BD)
0.5
(BD)
1
1
1
1
0.5
(AD)
10 )
(AD
10.5
(AD)
1.05
(AD)
0.25
(BD)
5
(BD)
5.25
(BD)
0.5
(BD)
0.1
0.1
0.1
0.1
0.5
(AD)
1
(AD)
1.5
(AD)
1.5
(AD)
0.25
(BD)
0.5
(BD)
0.75
(BD)
0.75
(BD)
WIDE
DYNAMIC
RANGE
Total Error =
±% rdg ±
Output VOS ±
Input VOS ×
(VY + VZ)/VX
1
0.10
0.01
10
28
(AD)
200
(AD)
228
(AD)
2.28
(AD)
16.75
(BD)
100
(BD)
116.75
(BD)
1.17
(BD)
10
0.05
2
0.25
1.76
(AD)
5
(AD)
6.76
(AD)
2.7
(AD)
1
(BD)
2.5
(BD)
3.5
(BD)
1.4
(BD)
5
0.01
0.01
5
125.75
(AD)
100
(AD)
225.75
(AD)
4.52
(AD)
75.4
(BD)
50
(BD)
125.4
(BD)
2.51
(BD)
10
0.01
0.1
1
25.53
(AD)
20
(AD)
45.53
(AD)
4.55
(AD)
15.27
(BD)
10
(BD)
25.27
(BD)
2.53
(BD)


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