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AD7224LR-18 Arkusz danych(PDF) 2 Page - Analog Devices

Numer części AD7224LR-18
Szczegółowy opis  LC2MOS 8-Bit DAC with Output Amplifiers
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AD7224LR-18 Arkusz danych(HTML) 2 Page - Analog Devices

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REV. B
–2–
AD7224–SPECIFICATIONS
(VDD = 11.4 V to 16.5 V, VSS = –5 V
10%; AGND = DGND = O V; VREF = +2 V to (VDD – 4 V)
1 unless otherwise noted.
All specifications TMIN to TMAX unless otherwise noted.)
DUAL SUPPLY
K, B, T
L, C, U
Parameter
Versions
2
Versions
2
Units
Conditions/Comments
STATIC PERFORMANCE
Resolution
8
8
Bits
Total Unadjusted Error
±2
±1
LSB max
VDD = +15 V ± 5%, VREF = +10 V
Relative Accuracy
±1
±1/2
LSB max
Differential Nonlinearity
±1
±1
LSB max
Guaranteed Monotonic
Full-Scale Error
±3/2
±1
LSB max
Full-Scale Temperature Coefficient
±20
±20
ppm/
°C max
VDD = 14 V to 16.5 V, VREF = +10 V
Zero Code Error
±30
±20
mV max
Zero Code Error Temperature Coefficient
±50
±30
µV/°C typ
REFERENCE INPUT
Voltage Range
2 to (VDD – 4)
2 to (VDD – 4)
V min to V max
Input Resistance
8
8
k
Ω min
Input Capacitance3
100
100
pF max
Occurs when DAC is loaded with all 1s.
DIGITAL INPUTS
Input High Voltage, VINH
2.4
2.4
V min
Input Low Voltage, VINL
0.8
0.8
V max
Input Leakage Current
±1
±1
µA max
VIN = 0 V or VDD
Input Capacitance
3
8
8
pF max
Input Coding
Binary
Binary
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
3
2.5
2.5
V/
µs min
Voltage Output Settling Time
3
Positive Full-Scale Change
5
5
µs max
VREF = +10 V; Settling Time to ± 1/2 LSB
Negative Full-Scale Change
7
7
µs max
VREF = +10 V; Settling Time to ± 1/2 LSB
Digital Feedthrough
50
50
nV secs typ
VREF = 0 V
Minimum Load Resistance
2
2
k
Ω min
VOUT = +10 V
POWER SUPPLIES
VDD Range
11.4/16.5
11.4/16.5
V min/V max
For Specified Performance
VSS Range
4.5/5.5
4.5/5.5
V min/V max
For Specified Performance
IDD
@ 25
°C
4
4
mA max
Outputs Unloaded; VIN = VINL or VINH
TMIN to TMAX
6
6
mA max
Outputs Unloaded; VIN = VINL or VINH
ISS
@ 25
°C
3
3
mA max
Outputs Unloaded; VIN = VINL or VINH
TMIN to TMAX
5
5
mA max
Outputs Unloaded; VIN = VINL or VINH
SWITCHING CHARACTERISTICS
3, 4
t1
@ 25
°C
90
90
ns min
Chip Select/Load DAC Pulse Width
TMIN to TMAX
90
90
ns min
t2
@ 25
°C
90
90
ns min
Write/Reset Pulse Width
TMIN to TMAX
90
90
ns min
t3
@ 25
°C
0
0
ns min
Chip Select/Load DAC to Write Setup Time
TMIN to TMAX
0
0
ns min
t4
@ 25
°C
0
0
ns min
Chip Select/Load DAC to Write Hold Time
TMIN to TMAX
0
0
ns min
t5
@ 25
°C
90
90
ns min
Data Valid to Write Setup Time
TMIN to TMAX
90
90
ns min
t6
@ 25
°C
10
10
ns min
Data Valid to Write Hold Time
TMIN to TMAX
10
10
ns min
NOTES
1Maximum possible reference voltage.
2Temperature ranges are as follows:
K, L Versions: –40
°C to +85°C
B, C Versions: –40
°C to +85°C
T, U Versions: –55
°C to +125°C
3Sample Tested at 25
°C by Product Assurance to ensure compliance.
4Switching characteristics apply for single and dual supply operation.
Specifications subject to change without notice.


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