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74LV123D-118 Arkusz danych(PDF) 1 Page - NXP Semiconductors

Numer części 74LV123D-118
Szczegółowy opis  Dual retriggerable monostable multivibrator with reset Rev. 7 ??12 December 2011
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Producent  PHILIPS [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LV123D-118 Arkusz danych(HTML) 1 Page - NXP Semiconductors

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1.
General description
The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible
with the 74HC123; 74HCT123. It is a dual retriggerable monostable multivibrator which
uses three methods to control the output pulse width:
1. The basic pulse time is programmed by the selection of an external resistor (REXT)
and capacitor (CEXT). These are normally connected as shown in Figure 9.
2. Once triggered, the basic output pulse width may be extended by retriggering the
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made
as long as desired (see Figure 12).
3. Alternatively, an output delay can be terminated at any time by a LOW-going edge on
input nRD, which also inhibits the triggering (see Figure 13).
Schmitt-trigger action in the nA and nB inputs makes the circuit highly tolerant of slower
input rise and fall times.
2.
Features and benefits
Optimized for low-voltage applications: 1.0 V to 5.5 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical output ground bounce: < 0.8 V at VCC = 3.3 V and Tamb = 25 C
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 C
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100 % duty factor
Direct reset terminates output pulses
Schmitt-trigger action on all inputs except for the reset input
74LV123
Dual retriggerable monostable multivibrator with reset
Rev. 7 — 12 December 2011
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