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LM1101N5 Arkusz danych(PDF) 2 Page - Cystech Electonics Corp. |
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LM1101N5 Arkusz danych(HTML) 2 Page - Cystech Electonics Corp. |
2 / 10 page CYStech Electronics Corp. Spec. No. : C552N5 Issued Date : 2010.10.26 Revised Date : Page No. : 2/10 LM1101N5 CYStek Product Specification Typical Application Circuit Pin Name Pin No. Pin Function EN 1 Chip Enable Input (Active high). GND 2 Ground. VIN 3 Input Voltage. This is the source input to the power device that supplies current to the output pin. VOUT 4 Output Voltage. VOUT is power output pin. An internal pull low resistance exists when the device is disabled. Minimum 1μF low ESR ceramic capacitor is required at this pin for stabilizing VOUT voltage. FB 5 Feedback Voltage. FB is the non-inverting input to the error amplifier. A resistor divider from the output to GND is used to set the regulation voltage as VOUT= 0.8 * (1+R1/R2 )(V) . This pin has high impedance and should be kept from non-inverting input to noisy source to guarantee stable operation. Pin Assignment Function Block Diagram |
Podobny numer części - LM1101N5 |
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Podobny opis - LM1101N5 |
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