Sample and Hold

DC Level

V/A

RAMP

(5 PA/V x (VIN ± VOUT) + 25 PA) x

LM25088

SNVS609G – DECEMBER 2008 – REVISED MARCH 2011

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Error Amplifier and PWM Comparator

The internal high gain error amplifier generates an error signal proportional to the difference between the

regulated output voltage and an internal precision voltage reference (1.205V). The output of the error amplifier is

connected to the COMP pin allowing the user to connect loop compensation components. Generally a type II

network, as illustrated in Figure 15, is sufficient. This network creates a pole at DC, a mid-band zero for phase

boost and a high frequency pole for noise reduction. The PWM comparator compares the emulated current

signal from the RAMP generator to the error amplifier output voltage at the COMP pin. A typical control loop

gain/phase plot is shown in Typical Performance Characteristics section of this document.

Ramp Generator

The ramp signal used for the pulse width modulator in current mode control is typically derived directly from the

buck switch current. This signal corresponds to the positive slope portion of the buck inductor current. Using this

signal for the PWM ramp simplifies the control loop transfer function to a single pole response and provides

inherent input voltage feed-forward compensation. The disadvantage of using the buck switch current signal for

PWM control is the large leading edge spike due to circuit parasitics which must be filtered or blanked. Also, the

current measurement may introduce significant propagation delays. The filtering time, blanking time and

propagation delay limit the minimum achievable pulse width. In applications where the input voltage may be

relatively large in comparison to the output voltage, controlling small pulse widths and duty cycles is necessary

for regulation. The LM25088 utilizes a unique ramp generator which does not actually measure the buck switch

current but rather reconstructs or emulates the signal. Emulating the inductor current provides a ramp signal that

is free of leading edge spikes and measurement or filtering delays. The current reconstruction is comprised of

two elements; a sample & hold DC level and an emulated current ramp.

Figure 17. Composition of Current Sense Signal

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