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TP2424 Arkusz danych(PDF) 1 Page - Supertex, Inc

Numer części TP2424
Szczegółowy opis  P-Channel Enhancement Mode Vertical DMOS FETs
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Producent  SUTEX [Supertex, Inc]
Strona internetowa  http://www.supertex.com
Logo SUTEX - Supertex, Inc

TP2424 Arkusz danych(HTML) 1 Page - Supertex, Inc

  TP2424 Datasheet HTML 1Page - Supertex, Inc TP2424 Datasheet HTML 2Page - Supertex, Inc TP2424 Datasheet HTML 3Page - Supertex, Inc  
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1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
TP2424
Features
Low threshold
High input impedance
Low input capacitance
Fast switching speeds
Free from secondary breakdown
Low input and output leakage
Applications
Logic level interfaces
Solid state relays
Linear amplifiers
Power management
Analog switches
Telecom switches
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures,
this device is free from thermal runaway and thermally-
induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching
speeds are desired.
P-Channel Enhancement Mode
Vertical DMOS FETs
-G indicates package is RoHS compliant (‘Green’)
Parameter
Value
Drain-to-source voltage
BV
DSS
Drain-to-gate voltage
BV
DGS
Gate-to-source voltage
±20V
Operating and storage temperature
-55°C to +150°C
Soldering temperature*
300°C
Absolute Maximum Ratings are those values beyond which damage to
the device may occur. Functional operation under these conditions is not
implied. Continuous operation of the device at the absolute rating level
may affect device reliability. All voltages are referenced to device ground.
* Distance of 1.6 mm from case for 10 seconds.
Absolute Maximum Ratings
Ordering Information
Device
Package Option
BV
DSS/BVDGS
(V)
R
DS(ON)
(max)
(Ω)
V
GS(th)
(max)
(V)
I
D(ON)
(min)
(mA)
TO-243AA (SOT-89)
TP2424
TP2424N8-G
-240
8.0
-2.4
-800
Pin Configuration
Product Marking
TO-243AA (SOT-89) (N8)
TO-243AA (SOT-89) (N8)
TP4CW W = Code for week sealed
= “Green” Packaging
GATE
SOURCE
DRAIN
DRAIN
Package may or may not include the following marks: Si or


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