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74FCT374 Arkusz danych(PDF) 2 Page - Integrated Device Technology |
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74FCT374 Arkusz danych(HTML) 2 Page - Integrated Device Technology |
2 / 7 page MILITARYANDCOMMERCIAL TEMPERATURERANGES 2 IDT54/74FCT374/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) PIN CONFIGURATION CERDIP/ SOIC TOP VIEW LCC TOP VIEW Symbol Rating Commercial Military Unit VTERM(2) Terminal Voltage –0.5 to +7 –0.5 to +7 V with Respect to GND VTERM(3) Terminal Voltage –0.5 to VCC –0.5 to VCC V with Respect to GND TA Operating Temperature 0 to +70 –55 to +125 °C TBIAS Temperature under BIAS –55 to +125 –65 to +135 °C TSTG Storage Temperature –55 to +125 –65 to +150 °C PT Power Dissipation 0.5 0.5 W IOUT DC Output Current 120 120 mA ABSOLUTE MAXIMUM RATINGS(1) NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Input and Vcc terminals only. 3. Output and I/O terminals only. Symbol Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 6 10 pF COUT Output Capacitance VOUT = 0V 8 12 pF CAPACITANCE (TA= +25°C, F = 1.0MHz) NOTE: 1. This parameter is measured at characterization but not tested. 1 2 3 4 5 7 9 6 8 10 11 12 13 14 15 16 17 18 19 20 O6 D7 D6 O5 D5 INDEX D1 O1 D3 O2 D2 2 3 1 16 15 14 11 19 18 20 17 13 12 5 6 7 4 8 9 10 D1 O0 D0 VCC O1 D3 O2 D2 O3 GND O7 O6 D7 D6 O5 O4 D5 D4 CP OE NOTE: 1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level Z = High Impedance NC = No Change ↑ = LOW-to-HIGH transition FUNCTION TABLE(1) Inputs Outputs Internal Function OE CP Dx Qx Qx High-Z H L X Z N C HH X Z N C Load L ↑ LL H Register L ↑ HH L H ↑ LZ H H ↑ HZ L Pin Names Description Dx D flip-flop data inputs C P Clock Pulse for the register. Enters data on LOW-to- HIGH transition. Ox 3-State Outputs (TRUE) O x 3-State Outputs (INVERTED) OE Active LOW 3-State Output Enable Input PIN DESCRIPTION |
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