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8XC196MC Arkusz danych(PDF) 8 Page - Intel Corporation

Numer części 8XC196MC
Szczegółowy opis  INDUSTRIAL MOTOR CONTROL MICROCONTROLLER
Download  22 Pages
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Producent  INTEL [Intel Corporation]
Strona internetowa  http://www.intel.com
Logo INTEL - Intel Corporation

8XC196MC Arkusz danych(HTML) 8 Page - Intel Corporation

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8XC196MC
PIN DESCRIPTIONS (Alphabetically Ordered) (Continued)
Symbol
Function
PORT6
8-bit output port P66 and P67 output PWM the others are used as the Wave
Form Generator outputs Can be used as standard output ports
PWM0 PWM1
Programmable duty cycle Programmable frequency Pulse Width Modulator
(P66 P67)
pins The duty cycle has a resolution of 256 steps and the frequency can vary
from 122 Hz to 31 KHz (16 MHz input clock) Pins may be configured as
standard output if PWM is not used
RD (P53)
Read signal output to external memory RD is low only during external memory
reads Can be used as standard IO when not used as RD
READY (P56)
Ready input to lengthen external memory cycles If READY e 0 the memory
controller inserts wait states until the next positive transition of CLKOUT
occurs with READY e 1 Can be used as standard IO when not used as
READY
RESET
Reset input to and open-drain output from the chip Held low for at least 16
state times to reset the chip Input high for normal operation RESET has an
Ohmic internal pullup resistor
T1CLK
Timer 0 Clock input This pin has two other alternate functions ACH10 and
(P12)
P12
T1DIR
Timer 0 Direction input This pin has two other alternate functions ACH11 and
(P13)
P13
VPP
The programming voltage is applied to this pin It is also the timing pin for the
return from Power Down circuit Connect this pin with a 1 mF capacitor to VSS
anda1MX resistor to VCC If the Power Down feature is not used connect
the pin to VCC
WG1 – WG3WG1 – WG3
3 phase output signals and their complements used in motor control
(P60 – P65)
applications The pins can also be configured as standard output pins
WR WRL (P52)
Write and Write Low output to external memory WR will go low every external
write WRL will go low only for external writes to an even byte Can be used as
standard IO when not used as WR WRL
XTAL1
Input of the oscillator inverter and the internal clock generator This pin should
be used when using an external clock source
XTAL2
Output of the oscillator inverter
PMODE
Determines the EPROM programming mode
(P04 – 7)
PACT
A low signal in Auto Programming mode indicates that programming is in
(P25)
process A high signal indicates programming is complete
PALE
A falling edge in Slave Programming Mode and Auto Configuration Byte
(P21)
Programming Mode indicates that ports 3 and 4 contain valid programming
addresscommand information (input to slave)
PROG
A falling edge in Slave Programming Mode begins programming A rising edge
(P22)
ends programming
PVER
A high signal in Slave Programming Mode and Auto Configuration Byte
(P20)
Programming Mode indicates the byte programmed correctly
CPVER
Cumulative Program Verification Pin is high if all locations since entering a
(P26)
programming mode have programmed correctly
AINC
Auto Increment Active low input enables the auto increment mode Auto
(P24)
increment will allow reading or writing of sequential EPROM locations without
address transactions across the PBUS for each read or write
8


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