Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AD5533 Arkusz danych(PDF) 4 Page - Analog Devices

Numer części AD5533
Szczegółowy opis  32-Channel Infinite Sample-and-Hold
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD5533 Arkusz danych(HTML) 4 Page - Analog Devices

  AD5533_15 Datasheet HTML 1Page - Analog Devices AD5533_15 Datasheet HTML 2Page - Analog Devices AD5533_15 Datasheet HTML 3Page - Analog Devices AD5533_15 Datasheet HTML 4Page - Analog Devices AD5533_15 Datasheet HTML 5Page - Analog Devices AD5533_15 Datasheet HTML 6Page - Analog Devices AD5533_15 Datasheet HTML 7Page - Analog Devices AD5533_15 Datasheet HTML 8Page - Analog Devices AD5533_15 Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 16 page
background image
REV. A
–4–
AD5533
TIMING CHARACTERISTICS
PARALLEL INTERFACE
Limit at TMIN, TMAX
Parameter
1, 2
(A Version)
Unit
Conditions/Comments
t1
0
ns min
CS to WR Setup Time
t2
0
ns min
CS to WR Hold Time
t3
50
ns min
CS Pulsewidth Low
t4
50
ns min
WR Pulsewidth Low
t5
20
ns min
A4–A0, CAL, OFFS_SEL to
WR Setup Time
t6
7
ns min
A4–A0, CAL, OFFS_SEL to
WR Hold Time
NOTES
1See Interface Timing Diagram.
2Guaranteed by design and characterization, not production tested.
Specifications subject to change without notice.
SERIAL INTERFACE
Limit at TMIN, TMAX
Parameter
1, 2
(A Version)
Unit
Conditions/Comments
fCLKIN
20
MHz max
SCLK Frequency
t1
20
ns min
SCLK High Pulsewidth
t2
20
ns min
SCLK Low Pulsewidth
t3
15
ns min
SYNC Falling Edge to SCLK Falling Edge Setup Time
t4
50
ns min
SYNC Low Time
t5
10
ns min
DIN Setup Time
t6
5
ns min
DIN Hold Time
t7
5
ns min
SYNC Falling Edge to SCLK Rising Edge Setup Time for Read Back
t8
3
20
ns max
SCLK Rising Edge to DOUT Valid
t9
3
60
ns max
SCLK Falling Edge to DOUT High Impedance
t10
400
ns min
10th SCLK Falling Edge to
SYNC Falling Edge for Read Back
t11
4
7
ns min
SCLK Falling Edge to
SYNC Falling Edge Setup Time for Read Back
NOTES
1See Serial Interface Timing Diagrams.
2Guaranteed by design and characterization, not production tested.
3These numbers are measured with the load circuit of Figure 2.
4
SYNC should be taken low while SCLK is low for read back.
Specifications subject to change without notice.
PARALLEL INTERFACE TIMING DIAGRAM
CS
WR
A4–A0, CAL,
OFFS SEL
t1
t4
t2
t3
t5
t6
Figure 1. Parallel Write (ISHA Mode Only)
IOL
200 A
IOH
200 A
CL
50pF
TO
OUTPUT
PIN
1.6V
Figure 2. Load Circuit for DOUT Timing Specifications


Podobny numer części - AD5533_15

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD5533ABC-1 AD-AD5533ABC-1 Datasheet
244Kb / 16P
   32-Channel, 14-Bit Voltage-Output DAC
REV. 0
AD5533ABC-1 AD-AD5533ABC-1 Datasheet
224Kb / 16P
   32-Channel Infinite Sample-and-Hold
REV. 0
AD5533ABC-1 AD-AD5533ABC-1 Datasheet
443Kb / 16P
   32-Channel, 14-Bit DAC with Precision Infinite Sample-and-Hold Mode
REV. A
AD5533ABC-1 AD-AD5533ABC-1 Datasheet
353Kb / 16P
   32-Channel Precision Infinite Sample-and-Hold
REV. A
AD5533B AD-AD5533B Datasheet
353Kb / 16P
   32-Channel Precision Infinite Sample-and-Hold
REV. A
More results

Podobny opis - AD5533_15

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD5533 AD-AD5533 Datasheet
224Kb / 16P
   32-Channel Infinite Sample-and-Hold
REV. 0
AD5533B AD-AD5533B Datasheet
353Kb / 16P
   32-Channel Precision Infinite Sample-and-Hold
REV. A
AD5533B AD-AD5533B_15 Datasheet
229Kb / 16P
   32-Channel Precision Infinite Sample-and-Hold
REV. A
logo
Maxim Integrated Produc...
DS4303 MAXIM-DS4303 Datasheet
421Kb / 8P
   Voltage Sample and Infinite Hold
Rev 0; 3/05
DS4305 MAXIM-DS4305 Datasheet
229Kb / 8P
   Sample-and-Infinite Hold Voltage Reference
Rev 0; 1/06
logo
Analog Devices
AD5532B AD-AD5532B Datasheet
443Kb / 16P
   32-Channel, 14-Bit DAC with Precision Infinite Sample-and-Hold Mode
REV. A
logo
Supertex, Inc
HV257 SUTEX-HV257 Datasheet
618Kb / 9P
   32 CHANNEL HIGH VOLTAGE SAMPLE AND HOLD AMPLIFIER ARRAY
HV257FG-G SUTEX-HV257FG-G Datasheet
1Mb / 16P
   32-Channel High Voltage Sample and Hold Amplifier Array
HV257 SUTEX-HV257_13 Datasheet
1Mb / 15P
   32-Channel High Voltage Sample and Hold Amplifier Array
logo
Intersil Corporation
HI-5046A INTERSIL-HI-5046A Datasheet
892Kb / 12P
   Sample and Hold
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com