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AD9042 Arkusz danych(PDF) 7 Page - Analog Devices |
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AD9042 Arkusz danych(HTML) 7 Page - Analog Devices |
7 / 24 page AD9042 Rev. B | Page 7 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 44 43 42 41 40 39 38 37 36 35 34 32 31 30 27 28 29 33 26 25 24 23 2 3 4 7 6 5 1 8 9 10 11 NC = NO CONNECT 12 13 14 15 16 17 18 19 20 21 22 PIN 1 AD9042 TOP VIEW (Not to Scale) DVCC DVCC ENCODE ENCODE GND GND AIN VOFFSET VREF C1 AVCC D8 D7 D6 D5 D4 D3 D2 D1 D0 (LSB) GND NC Figure 2. Pin Configuration Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1, 2 DVCC 5 V Power Supply (Digital). Powers output stage only. 3 ENCODE Encode Input. Data conversion initiated on rising edge. 4 ENCODE Complement of ENCODE. Drive differentially with ENCODE or bypass to ground for single-ended clock mode. 5, 6 GND Ground. 7 AIN Analog Input. 8 VOFFSET Voltage Offset Input. Sets mid point of analog input range. Normally tied to VREF through a 50 Ω resistor. 9 VREF Internal Voltage Reference. Nominally 2.4 V; normally tied to VOFFSET through a 50 Ω resistor. Bypass to ground and with 0.1 μF + 0.01 μF microwave chip capacitor. 10 C1 Internal Bias Point. Bypass to ground with a 0.01 μF capacitor. 11, 12 AVCC 5 V Power Supply (Analog). 13, 14 GND Ground. 15, 16 AVCC 5 V Power Supply (Analog). 17, 18 GND Ground. 19, 20 AVCC 5 V Power Supply (Analog). 21, 22 GND Ground. 23 NC No Connect 24 GND Ground. 25 D0 (LSB) Digital Output Bit (Least Significant Bit). 26 to 33 D1 to D8 Digital Output Bits. 34, 35 GND Ground. 36, 37 DVCC 5 V Power Supply (Digital). Powers output stage only. 38, 39 GND Ground. 40, 41 DVCC 5 V Power Supply (Digital). Powers output stage only. 42, 43 D9 to D10 Digital Output Bits. 44 D11 (MSB) Digital Output Bit (Most Significant Bit). Output coded as twos complement. |
Podobny numer części - AD9042_15 |
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Podobny opis - AD9042_15 |
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