Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AD9100 Arkusz danych(PDF) 7 Page - Analog Devices

Numer części AD9100
Szczegółowy opis  Ultrahigh Speed Monolithic Track-and-Hold
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9100 Arkusz danych(HTML) 7 Page - Analog Devices

Back Button AD9100_15 Datasheet HTML 3Page - Analog Devices AD9100_15 Datasheet HTML 4Page - Analog Devices AD9100_15 Datasheet HTML 5Page - Analog Devices AD9100_15 Datasheet HTML 6Page - Analog Devices AD9100_15 Datasheet HTML 7Page - Analog Devices AD9100_15 Datasheet HTML 8Page - Analog Devices AD9100_15 Datasheet HTML 9Page - Analog Devices AD9100_15 Datasheet HTML 10Page - Analog Devices AD9100_15 Datasheet HTML 11Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 12 page
background image
AD9100
REV. B
–7–
Hold vs. Track Mode Distortion
In many traditional high speed, open loop track-and-holds,
track mode distortion is often much better than hold mode
distortion. Track mode distortion does not include nonlineari-
ties due to the switch network, and does not correlate to the
relevant hold mode distortion. But since hold mode distortion
has traditionally been omitted from manufacturer’s specification
tables, users have had to discover for themselves the effective
overall hold mode distortion of the combined T/H and encoder.
The architecture of the AD9100 minimizes hold mode distortion
over its specified frequency range. As an example, in track mode
the worst harmonic generated for a 20 MHz input tone is typi-
cally –65 dBfs. In hold mode, under the same conditions
and sampling at 30 MSPS, the worst harmonic generated is
–74 dBfs. The reason is the output buffer in hold mode has only
dc distortion relevancy. With its inherent linearity (7 ns settling
to 0.01%), the output buffer has essentially settled to its dc
distortion level even for track plus hold times as short as 30 ns.
For a traditional open-loop output buffer, the ac (track mode)
and dc (hold mode) distortion levels are often the same.
Droop Rate
Droop rate does not necessarily affect a track and hold’s distor-
tion characteristics. If the droop rate is constant versus the input
voltage for a given hold time, it manifests itself as a dc offset to
the encoder. For the AD9100, the droop rate is typically
±1 mV/µs. If a signal is held for 1 µs, a subsequent encoder
would see a 1 mV offset voltage. If there is no droop sensitivity
to the held voltage value, the 1 mV offset would be constant
and “ride” on the input signal and introduce no hold-mode
nonlinearities .
In instances in which droop rate varies proportionately to the
magnitude of the held voltage signal level, a gain error only is
introduced to the A/D encoder. The AD9100 has a droop sensi-
tivity to the input level of 1.5 mV/ V–
µs. For a 2 V p-p input
signal, this translates to a 0.15%/
µs gain error and does not
cause additional distortion errors.
For the AD9100, droop sensitivity to input level is insignificant.
However, hold times longer than about 2
µs can cause distortion due
to the R
CH time constant at the hold capacitor. In addition,
hold mode noise will increase linearly vs. hold time and thus
degrade SNR performance.
Layout Considerations
For best performance results, good high speed design tech-
niques must be applied. The component (top) side ground
plane should be as large as possible; two-ounce copper cladding
is preferable. All runs should be as short as possible, and decou-
pling capacitors must be used.
Figure 14 is the schematic of a recommended AD9100 evalua-
tion board. (Contact factory concerning availability of assembled
boards.) All 0.01
µF decoupling capacitors should be low induc-
tance surface mount devices (P/N 05085C103MT050 from
AVX) and connected on the component side within 30 mils of
the designated pins; with the other sides soldered directly to the
top ground plane.
DUT
(DIP)
AD9100
C3
C1
C7
C6
C8
C5
AD9620
AD96685
C13
10 F
TP3
+VS
J7
J6
J5
–VS
C14
10 F
TP1
J1
VIN
C2
C4
J2
VOUT
J3
VBUFF
RL
2k
+VS –VS
C10
Q
Q
LE
R2
6
W1
W2
R1
100
CLOCK
IN
+5V
–5.2V
R4
510
R5
510
RIN
50
NOTE:
CONNECT TO W1 FOR TTL CLOCK SIGNALS;
CONNECT TO W2 FOR GROUND-REFERENCED SIGNALS.
RS
5
C9
+
R3
4
Figure 14. AD9100/PCB Evaluation Board Diagram
The 10
µF low frequency power supply tantalum decoupling
capacitors should be located within 1.5 inches of the AD9100.
The common 0.01
µF supply capacitors can be wired together.
The common power supply bus (connected to the 10
µF capaci-
tor and power supply source) can be routed to the underside of
the board to the daisy chain wired 0.01
µF supply capacitors.
For remote input and/or output drive applications, controlled
impedances are required to minimize line reflections which will
reduce signal fidelity. When capacitive and/or high impedance
levels are present, the load and/or source should be physically
located within approximately one inch of the AD9100. Note
that a series resistance, RS, is required if the load is greater than
6 pF. (The Recommended RS vs. CL chart in the “Typical
Performance Section” shows values of RS for various capacitive
loads which result in no more than a 20% increase in settling
time for loads up to 80 pF.) As much of the ground plane as
possible should be removed from around the VIN and VOUT pins
to minimize coupling onto the analog signal path.
While a single ground plane is recommended, the analog signal
and differential ECL clock ground currents follow a narrow path
directly under their common voltage signal line. To reduce
reflections, especially when terminations are used for transmission
line efficiency, the clock, VIN, and VOUT signals and respective
ground paths should not cross each other; if they do, unwanted
coupling can result.
High current ground transients via the high frequency decou-
pling capacitors can also cause unwanted coupling to the VIN
and VOUT current loops. Therefore, these analog terminations
should be kept as far as possible from the power supply decou-
pling capacitors to minimize feedthrough.


Podobny numer części - AD9100_15

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD9100AD AD-AD9100AD Datasheet
440Kb / 12P
   Ultrahigh Speed Monolithic Track-and-Hold
REV. B
AD9100JD AD-AD9100JD Datasheet
440Kb / 12P
   Ultrahigh Speed Monolithic Track-and-Hold
REV. B
AD9100SD AD-AD9100SD Datasheet
440Kb / 12P
   Ultrahigh Speed Monolithic Track-and-Hold
REV. B
More results

Podobny opis - AD9100_15

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD9100 AD-AD9100 Datasheet
440Kb / 12P
   Ultrahigh Speed Monolithic Track-and-Hold
REV. B
HTC-0300A AD-HTC-0300A Datasheet
1Mb / 4P
   Ultrahigh-Speed Hybrid Track-and-Hold Amplifiers
logo
Burr-Brown (TI)
SHC605 BURR-BROWN-SHC605 Datasheet
200Kb / 15P
   High-Speed Operational TRACK-AND-HOLD AMPLIFIER
logo
API Technologies Corp
MN346 APITECH-MN346 Datasheet
818Kb / 4P
   High Speed Track-hold Amplifiers
logo
Integrated Circuit Syst...
MN346 ICST-MN346 Datasheet
813Kb / 4P
   High Speed Track-hold Amplifiers
logo
Analog Devices
HTS-0010 AD-HTS-0010_15 Datasheet
744Kb / 6P
   Ultra High Speed Hybrid Track and Hold Ampligiers
HTS-0025 AD-HTS-0025 Datasheet
1Mb / 6P
   Ultra High Speed Hybird Track-and Hold Amplifiers
HTS-0025 AD-HTS-0025_15 Datasheet
1Mb / 6P
   Ultra High Speed Hybrid Track and Hold Amplifiers
HTS-0010 AD-HTS-0010 Datasheet
739Kb / 6P
   Ultra High Speed Hybird Track-and Hold Amplifiers
logo
List of Unclassifed Man...
MN374 ETC1-MN374 Datasheet
472Kb / 5P
   HIGH-SPEED HIGH-RESOLUTION TRACK-HOLD AMPLIFIER
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com