Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AD71028 Arkusz danych(PDF) 11 Page - Analog Devices

Numer części AD71028
Szczegółowy opis  Dual Digital BTSC Encoder with Integrated DAC
Download  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD71028 Arkusz danych(HTML) 11 Page - Analog Devices

Back Button AD71028_15 Datasheet HTML 7Page - Analog Devices AD71028_15 Datasheet HTML 8Page - Analog Devices AD71028_15 Datasheet HTML 9Page - Analog Devices AD71028_15 Datasheet HTML 10Page - Analog Devices AD71028_15 Datasheet HTML 11Page - Analog Devices AD71028_15 Datasheet HTML 12Page - Analog Devices AD71028_15 Datasheet HTML 13Page - Analog Devices AD71028_15 Datasheet HTML 14Page - Analog Devices AD71028_15 Datasheet HTML 15Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 20 page
background image
AD71028
Rev. 0 | Page 11 of 20
PHASE LINEARITY OF THE EXTERNAL ANALOG
FILTER
If the time alignment of the pilot to the carrier signal is not
close to 0 degrees, a loss of separation can occur. This means
that the external analog low-pass filter should be a linear-phase
design to provide constant group delay over the range from dc
to 50 kHz. Bessel filters are recommended for this application.
Figure 12 shows a recommended design for these filters.
INPUT LEVELS
The maximum input level to the AD71028 changes across
frequency. Table 10 shows the maximum allowable input level
for different frequencies. These values are part of the BTSC
specification and are not a function of this chip.
Table 10. Maximum Input Levels to the BTSC Encoder
across Frequency
Frequency (Hz)
Maximum Input Level (dBFS)
20 to 1000
0 dB
1600
–1 dB
2500
–3 dB
3150
–5 dB
5000
–8 dB
8000
–11 dB
12500
–15 dB
CLOCK RELATIONSHIPS
In an MPEG receiver architecture, all clocks are typically
generated from a 27 MHz master clock. The following integer
relationships are found between the clocks, with Fh =
15.734 kHz:
a) 27 MHz/Fh = 1716 = 2 × 2 × 3 × 11 × 13
b) Fh/2 = Fcolor_subcarrier/(5 × 7 × 13)
c) 27 MHz/Fcolor_subcarrier = (5 × 7)/(2 × 2 × 2 × 3 × 11)
d) 27 MHz/48 kHz = 1125/2
The AD71028 contains a clock doubler circuit that may be used
to generate an internal 512 × fS clock when the external clock is
256 × fS. The clock mode is set by connecting the DOUBLE pin
either high or low. This pin should be tied either high or low
and should not be changed after power-up.
The AD71028 requires a master clock at either 256 × 48 kHz
(12.288 MHz) when DOUBLE = 1 or 512 × 48 kHz
(24.576 MHz) when DOUBLE = 0. In some cases, this signal is
provided by the MPEG decoder chip itself. In other cases, only
the 27 MHz video clock may be available. In this case, the
AD71028 provides on-chip dividers to interface to an external
PLL such as the 74HC4046. Figure 4 shows the circuit to
accomplish this. The 27 MHz clock is applied to the AD71028
and divided down by 1125, producing a signal at 24 kHz. The
PLL oscillator output is divided down by 512, producing a
24 kHz output (when locked). These two signals are applied to
the phase-comparator inputs of the external PLL. Note that the
divided-down 27 MHz signal looks like a pulse with a duration
of one master clock, and therefore only edge-triggered phase
detectors should be used.
DSP
74HC4046
DIVIDE-BY-1125
DIVIDE-BY-512
27MHz IN
AD71028
Figure 4. PLL Connections for 27 MHz Master Clock


Podobny numer części - AD71028_15

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD71028JST AD-AD71028JST Datasheet
427Kb / 20P
   Dual Digital BTSC Encoder with Integrated DAC
REV. 0
AD71028JSTRL AD-AD71028JSTRL Datasheet
427Kb / 20P
   Dual Digital BTSC Encoder with Integrated DAC
REV. 0
More results

Podobny opis - AD71028_15

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD71028 AD-AD71028 Datasheet
427Kb / 20P
   Dual Digital BTSC Encoder with Integrated DAC
REV. 0
AD1970 AD-AD1970_15 Datasheet
450Kb / 20P
   Digital BTSC Encoder with Integrated ADC and DAC
REV. 0
AD1970 AD-AD1970 Datasheet
449Kb / 20P
   Digital BTSC Encoder with Integrated ADC and DAC
REV. 0
logo
Asahi Kasei Microsystem...
AK4145 AKM-AK4145 Datasheet
238Kb / 11P
   Digital BTSC Stereo Encoder
AK4145 AKM-AK4145 Datasheet
320Kb / 27P
   Digital BTSC Stereo Encoder
AK4140 AKM-AK4140 Datasheet
635Kb / 42P
   Digital BTSC Decoder
AK4140 AKM-AK4140 Datasheet
822Kb / 42P
   Digital BTSC Decoder
logo
Holt Integrated Circuit...
HI-1575 HOLTIC-HI-1575 Datasheet
117Kb / 12P
   3.3V Dual Transceivers with Integrated Encoder / Decoders
logo
TRINAMIC Motion Control...
TMCM-110-42-SE TRINAMIC-TMCM-110-42-SE Datasheet
638Kb / 23P
   Integrated encoder
logo
Analog Devices
ADV7190 AD-ADV7190 Datasheet
628Kb / 69P
   Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs
REV. 0
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com