6

4. NOTES ON USE

(1) In order to prevent latch up breakdown, power should be applied in the order of:

order.

This order should also be observed in transition periods.

externally.

the edge to the signal board. There is a possibility of high-voltage or logic type noise being superimposed

onto the sample & hold circuit, damaging the analog characteristics (output deviation, etc.).

(3) Likewise, to prevent the sample & hold characteristics from deteriorating, insert a bypass capacitor of 0.1

µF

supply may cause a driver through current, preventing the output range of the output buffer from being

sufficiently secured.

Therefore, determine the capacitance of the bypass capacitor after a thorough

evaluation.

(4) When LPC

= “H”, stable current supply of the output buffer may be shut off, which will impede normal

negative feedback, and when the LCD panel load is small, the output voltage may become abnormal.

Normal operation is assured with approximately 10 k

Ω + 50 pF, but when the time constant is smaller than

this, please set LPC

= “L”.

(5) Data input/output relationship

As shown below, irrespective of right shift and left shift.

Output

Data

(6) Bias control method

this case, the analog characteristics (output deviation, driving capability, response speed, etc.) will not

change. Please refer to the configuration in the figure below for the actual circuit. Also refer to the same

0.01 F

µ

(per IC)

µ