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LF2301JC55 Arkusz danych(PDF) 5 Page - LOGIC Devices Incorporated

Numer części LF2301JC55
Szczegółowy opis  Image Resampling Sequencer
Download  18 Pages
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Producent  LODEV [LOGIC Devices Incorporated]
Strona internetowa  http://www.logicdevices.com
Logo LODEV - LOGIC Devices Incorporated

LF2301JC55 Arkusz danych(HTML) 5 Page - LOGIC Devices Incorporated

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DEVICES INCORPORATED
Video Imaging Products
2-5
LF2301
Image Resampling Sequencer
08/16/2000–LDS.2301-H
addresses. An example of an ITS
implemented with two LF2301s is
shown in Figure 1. In this system the
following components are used: two
LF2301s, a multiplier-accumulator
(MAC), interpolation coefficient RAM,
and source/target image RAM.
Maximum image size is 4096 x 4096
pixels. Data word size is determined
by the word size of the external RAM.
A typical ITS performs image transfor-
mations as follows:
a. The LF2301s generate sequential
pixel addresses (left to right, top to
bottom) which fill the rectangle in the
target image RAM defined by
(UMIN,VMIN) and (UMAX +1, VMAX).
It is important to note that the U value
of the last pixel address on each line of
the target RAM is UMAX + 1.
b. The LF2301s calculate the address
of the corresponding pixel in the
source image RAM for each target
pixel address generated.
c. If interpolation is needed, the
external MAC sums the products of
the source pixels and the interpola-
tion coefficients. Control signals for
the MAC and address signals for the
interpolation coefficient RAM are
provided by the LF2301s.
d. The new pixel value is written into
the target image RAM.
The LF2301s generate source pixel
addresses according to the following
general second order equations:
x = Au2 + Bu + Cuv + Dv2 + Ev + F
y = Gu2 + Hu + Kuv + Lv2 + Mv + N
where (x,y) and (u,v) are the source
and target coordinates respectively.
A through N are user-defined param-
eters. The actual second order equa-
tions used are shown in Figure 3.
dx
du
d x
dudv
2
dx
dv
d x
2
du
2
d x
2
dv
2
m – m
2
2
n – n
2
2
+
=
x
0
m+
n +
mn +
+
x
dy
du
d y
dudv
2
dy
dv
d y
2
du
2
d y
2
dv
2
m – m
2
2
n – n
2
2
+
=
y
0
m+
n +
mn +
+
y
+ FOV CAY(w)
·
FOV m CAY(ker)
·
+
·
+ FOV CAX(w)
·
FOV m CAX(ker)
·
+
·
m
=
u
UMIN +
n
=
v
VMIN +
NOTE:
m – m
2
2
APPROXIMATES THE EXPONENTIAL CHARACTERISTIC OF
m
2
.
FIGURE 3. ADDRESS TRANSFORMATION EQUATIONS
FIGURE 2. TEST MODE DATA ROUTING
SIGN
7
4
12
1
CA3-0
CA7-4
X11-0/T11-0
28-BIT INTERNAL
ACCUMULATOR
WALK COUNTER
4
4
12
12


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