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LF2301JC55 Arkusz danych(PDF) 6 Page - LOGIC Devices Incorporated |
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LF2301JC55 Arkusz danych(HTML) 6 Page - LOGIC Devices Incorporated |
6 / 18 page DEVICES INCORPORATED LF2301 Image Resampling Sequencer 2-6 08/16/2000–LDS.2301-H Video Imaging Products ADDR MSB FORMAT LSB ROW COLUMN 0000 211 210 29 28 27 26 25 24 23 22 21 20 XMIN YMIN 0001 211 210 29 28 27 26 25 24 23 22 21 20 XMAX YMAX 0010 26 25 24 23 22 21 20 2–1 2–2 2–3 2–4 2–5 x0 (LS) y0 (LS) 0011 ALR AIN PIPE R/C M1 M0 –212 211 210 29 28 27 Controls, x0 (MS) Controls, y0 (LS) 0100 2–1 2–2 2–3 2–4 2–5 2–6 2–7 2–8 2–9 2–10 2–11 2–12 dx/du (LS) dy/du (LS) 0101 TM F2 F1 F0 –27 26 25 24 23 22 21 20 Controls, dx/du (MS) Controls, dy/du (MS) 0110 2–1 2–2 2–3 2–4 2–5 2–6 2–7 2–8 2–9 2–10 2–11 2–12 dx/dv (LS) dy/dv (LS) 0111 K3 K2 K1 K0 –27 26 25 24 23 22 21 20 Kernel, dx/dv (MS) Kernel, dy/dv (MS) 1000 2–9 2–10 2–11 2–12 2–13 2–14 2–15 2–16 2–17 2–18 2–19 2–20 d2x/dudv (LS) d2y/dudv (LS) 1001 –23 22 21 20 2–1 2–2 2–3 2–4 2–5 2–6 2–7 2–8 d2x/dudv (MS) d2y/dudv (MS) 1010 2–9 2–10 2–11 2–12 2–13 2–14 2–15 2–16 2–17 2–18 2–19 2–20 d2x/du2 (LS) d2y/du2 (LS) 1011 –23 22 21 20 2–1 2–2 2–3 2–4 2–5 2–6 2–7 2–8 d2x/du2 (MS) d2y/du2 (MS) 1100 2–9 2–10 2–11 2–12 2–13 2–14 2–15 2–16 2–17 2–18 2–19 2–20 d2x/dv2 (LS) d2y/dv2 (LS) 1101 –23 22 21 20 2–1 2–2 2–3 2–4 2–5 2–6 2–7 2–8 d2x/dv2 (MS) d2y/dv2 (MS) 1110 211 210 29 28 27 26 25 24 23 22 21 20 UMIN VMIN 1111 211 210 29 28 27 26 25 24 23 22 21 20 UMAX VMAX TABLE 4. PARAMETER REGISTER FORMATS (ROW OR COLUMN MODE) Transformation Parameter Register Loading The LF2301 allows Transformation Parameters to be updated on-the-fly. The loading of these registers is double-buffered (see Figure 4). Any or all of the first level registers can be loaded using P11-0, B3-0, and WEN without affecting the param- eters currently in use. LDR simultaneously updates all Transformation Parameter Registers. If Autoload (ALR) is active, these registers will be updated automati- cally at the beginning of each new image. Note that NOOP does not affect the loading of the Transforma- tion Parameter Registers. FIGURE 4. LDR CONTROL FOR PARAMETER UPDATE 4 12 WEN CLK B3-0 C15 C14 C13 C2 C1 LDR C0 PRELOAD REGISTERS TRANSFORMATION PARAMETER REGISTERS P11-0 |
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