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74LV14 Arkusz danych(PDF) 10 Page - NXP Semiconductors |
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74LV14 Arkusz danych(HTML) 10 Page - NXP Semiconductors |
10 / 19 page 74LV14 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 12 December 2011 10 of 19 NXP Semiconductors 74LV14 Hex inverting Schmitt trigger 15. Application information The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula: Padd =fi (tr ICC(AV) +tf ICC(AV)) VCC where: Padd = additional power dissipation (W); fi = input frequency (MHz); tr =rise time (ns); 10 %to90%; tf = fall time (ns); 90 % to 10 %; I CC(AV) = average additional supply current (A). Average I CC(AV) differs with positive or negative input transitions, as shown in Figure 13. An example of a relaxation circuit using the 74LV14 is shown in Figure 14. (1) Positive-going edge. (2) Negative-going edge. Fig 13. Average additional supply current as a function of VCC 001aah097 VCC (V) 1.0 3.0 2.5 1.5 2.0 50 25 75 100 ΔICC(AV) ( μA) 0 (1) (2) Fig 14. Relaxation oscillator mna035 R C f 1 T --- 1 0.8 RC --------------------- = |
Podobny numer części - 74LV14_15 |
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Podobny opis - 74LV14_15 |
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