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74LV14 Arkusz danych(PDF) 3 Page - NXP Semiconductors |
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74LV14 Arkusz danych(HTML) 3 Page - NXP Semiconductors |
3 / 19 page 74LV14 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 12 December 2011 3 of 19 NXP Semiconductors 74LV14 Hex inverting Schmitt trigger 6. Pinning information 6.1 Pinning 6.2 Pin description (1) The die substrate is attached to the exposed die pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14 74LV14 1A VCC 1Y 6A 2A 6Y 2Y 5A 3A 5Y 3Y 4A GND 4Y 001aah095 1 2 3 4 5 6 7 8 10 9 12 11 14 13 001aah096 74LV14 Transparent top view VCC(1) 3Y 4A 3A 5Y 2Y 5A 2A 6Y 1Y 6A 6 9 5 10 4 11 3 12 2 13 terminal 1 index area Table 2. Pin description Symbol Pin Description 1A 1 data input 1Y 2 data output 2A 3 data input 2Y 4 data output 3A 5 data input 3Y 6 data output GND 7 ground (0 V) 4Y 8 data output 4A 9 data input 5Y 10 data output 5A 11 data input 6Y 12 data output 6A 13 data input VCC 14 supply voltage |
Podobny numer części - 74LV14_15 |
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Podobny opis - 74LV14_15 |
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