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74LV164 Arkusz danych(PDF) 11 Page - NXP Semiconductors |
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74LV164 Arkusz danych(HTML) 11 Page - NXP Semiconductors |
11 / 21 page 9397 750 14501 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 03 — 4 February 2005 11 of 21 Philips Semiconductors 74LV164 8-bit serial-in/parallel-out shift register [2] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. [3] The condition is VI = GND to VCC. 12. Waveforms Measurement points are given in Table 9. VOL and VOH are typical output voltage drop that occur with the output load. Fig 6. Propagation delay clock (CP) to output (Qn), clock pulse width and maximum clock frequency Measurement points are given in Table 9. VOL and VOH are typical output voltage drop that occur with the output load. Fig 7. Pulse width master reset (MR), propagation delay master reset (MR) to output (Qn) and removal time master reset (MR) to clock (CP) 001aac426 CP input Qn output tPHL tPLH tW VOH VI GND VOL VM VM 1/fmax 001aac427 MR input CP input Qn output tPHL tW trem VM VI GND VI VOH VOL GND VM VM |
Podobny numer części - 74LV164_15 |
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Podobny opis - 74LV164_15 |
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