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74LV165 Arkusz danych(PDF) 5 Page - NXP Semiconductors |
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74LV165 Arkusz danych(HTML) 5 Page - NXP Semiconductors |
5 / 21 page 74LV165 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved. Product data sheet Rev. 6 — 19 February 2014 5 of 21 NXP Semiconductors 74LV165 8-bit parallel-in/serial-out shift register 6. Functional description [1] H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition; q = state of the referenced output one set-up time prior to the LOW-to-HIGH clock transition; X = don’t care; = LOW-to-HIGH clock transition. Table 3. Function table[1] Operating modes Inputs Qn registers Output PL CE CP DS D0 to D7 Q0 Q1 to Q6 Q7 Q7 parallel load L X X X L L L to L L H L XXX H H H to H H L serial shift H L l X L q0 to q5 q6 q6 HL h X H q0 to q5 q6 q6 hold “do nothing” H H X X X q0 q1 to q6 q7 q7 Fig 6. Timing diagram |
Podobny numer części - 74LV165_15 |
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Podobny opis - 74LV165_15 |
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