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74LV4051 Arkusz danych(PDF) 1 Page - NXP Semiconductors

Numer części 74LV4051
Szczegółowy opis  8-channel analog multiplexer/demultiplexer
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Producent  PHILIPS [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LV4051 Arkusz danych(HTML) 1 Page - NXP Semiconductors

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1.
General description
The 74LV4051 is an 8-channel analog multiplexer/demultiplexer with three digital select
inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to
Y7) and a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin
and function compatible with 74HC4051 and 74HCT4051. With E LOW, one of the eight
switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are
in the high-impedance OFF-state, independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).
The VCC to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (Y0 to Y7, and Z)
can swing between VCC as a positive limit and VEE as a negative limit. VCC  VEE may not
exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to
GND (typically ground).
2.
Features and benefits
Optimized for low-voltage applications: 1.0 V to 6.0 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Low ON resistance:
145
 (typical) at V
CC  VEE = 2.0 V
80
 (typical) at V
CC  VEE = 3.0 V
60
 (typical) at V
CC  VEE = 4.5 V
Logic level translation:
To enable 3 V logic to communicate with
3 V analog signals
Typical ‘break before make’ built in
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 Cto+85 C and from 40 Cto+125 C
74LV4051
8-channel analog multiplexer/demultiplexer
Rev. 5 — 17 September 2014
Product data sheet


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