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74LV4052 Arkusz danych(PDF) 4 Page - NXP Semiconductors |
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74LV4052 Arkusz danych(HTML) 4 Page - NXP Semiconductors |
4 / 26 page 74LV4052 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 4 — 1 July 2013 4 of 26 NXP Semiconductors 74LV4052 Dual 4-channel analog multiplexer/demultiplexer 5. Pinning information 5.1 Pinning 5.2 Pin description Fig 5. Pin configuration for DIP16 andSO16 Fig 6. Pin configuration for (T)SSOP16 Table 2. Pin description Symbol Pin Description 2Y0 1 independent input or output 2Y2 2 independent input or output 2Z 3 common input or output 2Y3 4 independent input or output 2Y1 5 independent input or output E 6 enable input (active LOW) VEE 7 negative supply voltage GND 8 ground (0 V) S1 9 select logic input S0 10 select logic input 1Y3 11 independent input or output 1Y0 12 independent input or output 1Z 13 common input or output 1Y1 14 independent input or output 1Y2 15 independent input or output VCC 16 positive supply voltage |
Podobny numer części - 74LV4052_15 |
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Podobny opis - 74LV4052_15 |
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