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74LV4094 Arkusz danych(PDF) 9 Page - NXP Semiconductors |
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74LV4094 Arkusz danych(HTML) 9 Page - NXP Semiconductors |
9 / 21 page 74LV4094 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 4 — 19 December 2011 9 of 21 NXP Semiconductors 74LV4094 8-stage shift-and-store bus register tW pulse width CP HIGH or LOW; see Figure 8 VCC = 2.0 V 34 9 - 41 - ns VCC = 2.7 V 25 6 - 30 - ns VCC = 3.0 V to 3.6 V [2] 20 5 - 24 - ns STR HIGH; see Figure 9 VCC = 2.0 V 34 9 - 41 - ns VCC = 2.7 V 25 6 - 30 - ns VCC = 3.0 V to 3.6 V [2] 20 5 - 24 - ns tsu set-up time D to CP; see Figure 10 VCC = 1.2 V - 25 - - - ns VCC = 2.0 V 22 9 - 26 - ns VCC = 2.7 V 16 6 - 19 - ns VCC = 3.0 V to 3.6 V [2] 13 5 - 15 - ns CP to STR; see Figure 9 VCC = 1.2 V - 50 - - - ns VCC = 2.0 V 43 17 - 51 - ns VCC = 2.7 V 31 13 - 38 - ns VCC = 3.0 V to 3.6 V [2] 25 10 - 30 - ns th hold time D to CP; see Figure 10 VCC = 1.2 V - 10 - - - ns VCC = 2.0 V 5 4- +5 - ns VCC = 2.7 V 5 3- +5 - ns VCC = 3.0 V to 3.6 V [2] 5 2- +5 - ns CP to STR; see Figure 9 VCC = 1.2 V - 25 - - - ns VCC = 2.0 V 5 9- +5 - ns VCC = 2.7 V 5 6- +5 - ns VCC = 3.0 V to 3.6 V [2] 5 5- +5 - ns fmax maximum frequency CP; see Figure 8 VCC = 2.0 V 14 52 - 12 - MHz VCC = 2.7 V 19 70 - 16 - MHz VCC = 3.0 V to 3.6 V 24 87 - 20 - MHz VCC = 3.3 V; CL = 15 pF [2] -95 - - - MHz Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12. Symbol Parameter Conditions 40 C to 85 C 40 C to +125 C Unit Min Typ[1] Max Min Max |
Podobny numer części - 74LV4094_15 |
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Podobny opis - 74LV4094_15 |
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