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ISL6322CRZ Arkusz danych(PDF) 29 Page - Intersil Corporation |
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ISL6322CRZ Arkusz danych(HTML) 29 Page - Intersil Corporation |
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29 / 41 page  29 FN6328.2 August 2, 2007 I2C Read and Write Protocol Reading from the Internal Registers The ISL6322 has the ability to read from both registers separately or read from them consecutively. Prior to reading from an internal register, the master must first select the desired register by writing to it and sending the register’s address byte. This process begins by the master sending a control byte with the R/W bit set to 0, indicating a write. Once it receives an Acknowledge from the ISL6322, it sends a register address byte representing the internal register it wants to read from (0000_0000 for RGS1 or 0000_0001 for RGS2). The ISL6322 will respond with an Acknowledge. The master must then respond with a Stop condition. After the Stop condition, the master follows with a new Start condition, and then sends a new control byte with the R/W bit set to 1, indicating a read. The ISL6322 will then respond by sending the master an Acknowledge, followed by the data byte stored in that register. The master must then send a Not Acknowledge followed by a Stop command, which will complete the read transaction. It is also possible for both registers to be read consecutively. To do this the master must read from register RGS1 first. This transaction begins with the master sending a control byte with the R/W bit set to 0. If it receives an Acknowledge from the ISL6322, it sends the register address byte 0000_0000, representing the internal register RGS1. The ISL6322 will respond with an Acknowledge. The master must then respond with a Stop condition. After the Stop condition the master follows with a new Start condition, and then sends a new control byte with the R/W bit set to 1, indicating a read. The ISL6322 will then respond by sending the master an Acknowledge, followed by the data byte stored in register RGS. The master must then send an Acknowledge, and after doing so, the ISL6322 will respond by sending the data byte stored in register RGS2. The master must then send a Not Acknowledge followed by a Stop command, which will complete the read transaction. Resetting the Internal Registers The ISL6322’s two internal I2C registers always initialize to 0000_0000 when the controller first receives power. Once the voltage on the VCC pin rises above the POR rising threshold level, these registers can be changed at any time via the I2C interface. If the voltage on the VCC pin falls below the POR falling threshold, the internal registers are automatically reset to 0000_0000. It is possible to reset the internal registers without powering down the controller and without requiring the controller to stop regulating and soft-start again. This can be done by one of two methods. The first method is to simply write to the internal registers over the I2C interface to be 0000_0000. The other method is pull the voltage on the SS/RST/A0 pin down below 0.4V. This will immediately reset the internal registers to 0000_0000 and will not stop the controller from regulating the output voltage or cause soft-start to recycle. S slave_addr + W A reg_addr A reg_data A P S slave_addr + W A A A S A N Write to a Single Register Write to Both Registers Read from a Single Register Driven by Master Driven by ISL6322 0000_0000 reg_RGS1_data reg_RGS2_data A P reg_addr A P S slave_addr + W slave_addr + R A reg_data P S A Read from Both Registers 0000_0000 A P S slave_addr + W slave_addr + R A reg_RGS1_data A reg_RGS2_data N P S = START Condition A = Acknowledge P = STOP Condition N = No Acknowledge TABLE 8. REGISTER RGS1 (VOLTAGE MARGINING OFFSET) BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 Voffset (mV) X X VO5 VO4 VO3 VO2 VO1 VO0 xx 0 0 0 0 0 00.0 xx 0 0 0 0 0 1 12.5 xx 0 0 0 0 1 0 25.0 xx 0 0 0 0 1 1 37.5 xx 0 0 0 1 0 0 50.00 xx 0 0 0 1 0 1 62.5 xx 0 0 0 1 1 0 75.0 xx 0 0 0 1 1 1 87.5 xx 0 0 1 0 0 0 100.0 xx 0 0 1 0 0 1 112.5 ISL6322 |
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