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TC1321EUA Arkusz danych(PDF) 3 Page - Microchip Technology |
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TC1321EUA Arkusz danych(HTML) 3 Page - Microchip Technology |
3 / 16 page © 2002 Microchip Technology Inc. DS21387B-page 3 TC1321 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings* Supply Voltage (VDD) ............................................. +6V Voltage onany Pin ... (GND –0.3V) to (VDD +0.3V) Current on any Pin ............................................ ±50mA Package Thermal Resistance ( θJA)............ 330°C C/W Operating Temperature (TA)........................ See Below Storage Temperature (TSTG) .............. -65°C to +150°C *Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. TC1321 ELECTRICAL SPECIFICATIONS Electrical Characteristics: VDD = 2.7V to 5.5V, -40°C ≤ TA ≤ +85°C, VREF = 1.2 unless otherwise noted. Symbol Parameter Min Typ Max Unit Test Conditions Power Supply VDD Supply Voltage 2.7 — 5.5 V IDD Operating Current — 350 500 mA VDD =5.5V, VREF =1.2V Serial Port Inactive (Note 1) IDD-STANDBY Standby Supply Current — 0.1 1 µAVDD =3.3V Serial Port Inactive (Note 1) Static Performance - Analog Section Resolution — — 10 Bits INL Integral Non-Linearity at FS, TA = +25°C — — ±4.0 LSB (Note 2) FSE Full Scale Error — — ±3 %FS DNL Differential Non-Linearity, TA = +25°C -1 — +2 LSB All Codes (Note 2) VOS Offset Error at VOUT —±0.3 ±8 mV (Note 2) TCVOS Offset Error Tempco at VOUT —10 — µv/°C PSRR Power Supply Rejection Ratio — 80 — dB VDD at DC VREF Voltage Reference Range 0 — VDD –1.2 V IREF Reference Input Leakage Current — — ±1.0 µA VSW Voltage Swing 0 — VREF VVREF ≤ (VDD –1.2V) ROUT Output Resistance @ VOUT —5.0 — Ω ROUT (Ω) IOUT Output Current (Source or Sink) — 2 — mA ISC Output Short-Circuit Current VDD =5.5V — — 30 20 50 50 mA mA Source Sink Dynamic Performance SR Voltage Output Slew Rate — 0.8 — V/ µs tSETTLE Output Voltage Full Scale Settling Time — 10 — µsec tWU Wake-up Time — 20 — µs Digital Feed Through and Crosstalk — 5 — nV-s SDA = VDD,SCL = 100kHz Serial Port Interface VIH Logic Input High 2.4 — VDD V VIL Logic Input Low — — 0.6 — VOL SDA Output Low — — — — 0.4 0.6 V V IOL = 3mA (Sinking Current) IOL =6mA CIN Input Capacitance SDA, SCL — 5 0.4 pF ILEAK I/O Leakage — — ±1.0 µA Note 1: SDA and SCL must be connected to VDD or GND. 2: Measured at VOUT ≥ 50mV referred to GND to avoid output buffer clipping. |
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