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ML4802 Arkusz danych(PDF) 8 Page - Micro Linear Corporation |
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ML4802 Arkusz danych(HTML) 8 Page - Micro Linear Corporation |
8 / 15 page ML4802 8 Datasheet August 2000 control loop for the converter, which in turn drives a current error amplifier and switching output driver. The second requirement is met by using the rectified AC line voltage to modulate the output of the voltage control loop. Such modulation causes the current error amplifier to command a power stage current which varies directly with the input voltage. In order to prevent ripple which will necessarily appear at the output of the boost circuit (typically about 10VAC on a 385V DC level, or about 40VAC during Green Mode operation) from introducing distortion back through the voltage error amplifier, the bandwidth of the voltage loop is deliberately kept low. A final refinement is to adjust the overall gain of the PFC such to be proportional to 1/VIN2, which linearizes the transfer function of the system as the AC input voltage varies. Since the boost converter topology in the ML4802 PFC is of the current-averaging type, no slope compensation is required. PFC SECTION Gain Modulator Figure 3 shows a block diagram of the PFC section of the ML4802. The gain modulator is the heart of the PFC, as it is this circuit block which controls the response of the current loop to line voltage waveform and frequency, rms line voltage, and PFC output voltage. There are three inputs to the gain modulator. These are: 1) A current representing the instantaneous input voltage (amplitude and waveshape) to the PFC. The rectified AC input sine wave is converted to a proportional current via a resistor and is then fed into the gain modulator at IAC. Sampling current in this way minimizes ground noise, as is required in high power switching power conversion environments. The gain modulator responds linearly to this current. 2) A voltage proportional to the long-term rms AC line voltage, derived from the rectified line voltage after scaling and filtering. This signal is presented to the gain modulator at VRMS. The gain modulator’s output is inversely proportional to VRMS2 (except at unusually low values of VRMS where special gain contouring takes over to limit power dissipation of the circuit components under heavy brownout conditions). The relationship between VRMS and gain is designated as K, and is illustrated in the Typical Performance Characteristics. 3) The output of the voltage error amplifier, VEAO. The gain modulator responds linearly to variations in this voltage. FUNCTIONAL DESCRIPTION (Continued) Figure 3. PFC Section Block Diagram FROM GREEN MODE CONTROLLER VEAO IEAO OVP PFC ILIMIT VREF POWER FACTOR CORRECTOR + - 7.5V REFERENCE VCC VEA + – IEA + - PFC OUT 2.75V -1V 1.6k Ω 1.6k Ω 8V 12 2.5V - + 15 VFB 2 IAC 4 VRMS 3 ISENSE 8 RAMP 1 7 RT/CT 14 13 1 16 PFC OUTPUT DRIVER PFC CONTROLLER GAIN MODULATOR DUTY CYCLE LIMIT OSCILLATOR ÷2 |
Podobny numer części - ML4802 |
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Podobny opis - ML4802 |
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