LC75897PW

http://www.onsemi.com

2

Specifications

Absolute Maximum Ratings at Ta = 25

C, VSS = 0V

Parameter

Symbol

Conditions

Ratings

Unit

Maximum supply voltage

VDD max

VDD

-0.3 to +7.0

V

VLCD max

VLCD

-0.3 to +7.0

Input voltage

VIN1

CE, CL, DI, INH

-0.3 to +7.0

V

VIN2

OSC

-0.3 to VDD+0.3

VIN3

VLCD1, VLCD2

-0.3 to VLCD+0.3

Output voltage

VOUT1

OSC

-0.3 to VDD+0.3

V

VOUT2

VLCD0, S1 to S129, COM1 to COM4, P1 to P8

-0.3 to VLCD+0.3

Output current

IOUT1

S1 to S129

300

A

IOUT2

COM1 to COM4

3

mA

IOUT3

P1 to P8

5

Allowable power dissipation

Pd max

Ta = 85

C

200

mW

Operating temperature

Topr

-40 to +85

C

Storage temperature

Tstg

-55 to +125

C

Allowable Operating Ranges at Ta = -40 to +85

C, VSS = 0V

Parameter

Symbol

Conditions

Ratings

unit

min

typ

max

Supply voltage

VDD

VDD

2.7

6.0

V

VLCD

VLCD,

VLCD0 = 0.70VLCD to 0.95VLCD

4.0

6.0

VLCD, VLCD0 = VLCD

2.7

6.0

Output voltage

VLCD0

VLCD0

2.7

VLCD

V

Input voltage

VLCD1

VLCD1

2/3VLCD0

VLCD0

V

VLCD2

VLCD2

1/3VLCD0

VLCD0

Input high-level voltage

VIH1

CE, CL, DI, INH

0.8VDD

6.0

V

VIH2

OSC external clock operating mode

0.7VDD

VDD

Input low-level voltage

VIL1

CE, CL, DI, INH

0

0.2VDD

V

VIL2

OSC external clock operating mode

0

0.3VDD

Recommended external resistor

for RC oscillation

ROSC

OSC RC oscillator operating mode

10

k



Recommended external capacitor

for RC oscillation

COSC

OSC RC oscillator operating mode

470

pF

Guaranteed range of RC oscillation

fOSC

OSC RC oscillator operating mode

150

300

600

kHz

External clock operating frequency

fCK

OSC external clock operating mode

[Figure 4]

150

300

600

kHz

External clock duty cycle

DCK

OSC external clock operating mode

[Figure 4]

30

50

70

%

Data setup time

tds

CL,DI

[Figure 2],[ Figure 3]

160

ns

Data hold time

tdh

CL,DI

[Figure 2],[ Figure 3]

160

ns

CE wait time

tcp

CE,CL

[Figure 2],[ Figure 3]

160

ns

CE setup time

tcs

CE,CL

[Figure 2],[ Figure 3]

160

ns

CE hold time

tch

CE,CL

[Figure 2],[ Figure 3]

160

ns

High-level clock pulse width

t

H

CL

[Figure 2],[ Figure 3]

160

ns

Low-level clock pulse width

t

L

CL

[Figure 2],[ Figure 3]

160

ns

Rise time

tr

CE, CL, DI

[Figure 2],[ Figure 3]

160

ns

Fall time

tf

CE, CL, DI

[Figure 2],[ Figure 3]

160

ns

INH switching time

tc

INH, CE

[Figure 5],[ Figure 6]

10

s

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,

damage may occur and reliability may be affected.

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended

Operating Ranges limits may affect device reliability.