Zakładka z wyszukiwarką danych komponentów |
|
TMP102 Arkusz danych(PDF) 11 Page - Texas Instruments |
|
|
TMP102 Arkusz danych(HTML) 11 Page - Texas Instruments |
11 / 29 page TMP102-Q1 www.ti.com SBOS702C – OCTOBER 2014 – REVISED DECEMBER 2015 7.3.7 SMBus Alert Function The TMP102-Q1 device supports the SMBus alert function. When the TMP102-Q1 device operates in Interrupt Mode (TM = 1), the ALERT pin can be connected as an SMBus alert signal. When a master senses that an ALERT condition is present on the ALERT line, the master sends an SMBus alert command (0001 1001) to the bus. If the ALERT pin is active, the device acknowledges the SMBus alert command and responds by returning the slave address on the SDA line. The eighth bit (LSB) of the slave address byte indicates if the ALERT condition was caused by the temperature exceeding THIGH or falling below TLOW. For POL = 0, the LSB is low if the temperature is greater than or equal to THIGH; this bit is high if the temperature is less than TLOW. The polarity of this bit is inverted if POL = 1. See Figure 11 for details of this sequence. If multiple devices on the bus respond to the SMBus alert command, arbitration during the slave address portion of the SMBus alert command determines which device clears the ALERT status. The device with the lowest two- wire address wins the arbitration. If the TMP102-Q1 device wins the arbitration, its ALERT pin inactivates at the completion of the SMBus alert command. If the TMP102-Q1 device loses the arbitration, its ALERT pin remains active. 7.3.8 General Call The TMP102-Q1 device responds to a two-wire general call address (000 0000) if the eighth bit is 0. The device acknowledges the general call address and responds to commands in the second byte. If the second byte is 0000 0110, the TMP102-Q1 device internal registers are reset to power-up values. The TMP102-Q1 device does not support the general address acquire command. 7.3.9 High-Speed (Hs) Mode In order for the two-wire bus to operate at frequencies above 400 kHz, the master device must issue an Hs-Mode master code (0000 1xxx) as the first byte after a START condition to switch the bus to high-speed operation. The TMP102-Q1 device does not acknowledge this byte, but switches the input filters on SDA and SCL and the output filters on SDA to operate in Hs-mode, allowing transfers of up to 2.85 MHz. After the Hs-Mode master code has been issued, the master transmits a two-wire slave address to initiate a data transfer operation. The bus continues to operate in Hs-Mode until a STOP condition occurs on the bus. Upon receiving the STOP condition, the TMP102-Q1 device switches the input and output filters back to fast-mode operation. 7.3.10 Time-Out Function The TMP102-Q1 device resets the serial interface if SCL is held low for 30 ms (typ) between a start and stop condition. The TMP102-Q1 device releases the SDA line if the SCL pin is pulled low and waits for a start condition from the host controller. To avoid activating the time-out function, maintaining a communication speed of at least 1 kHz for SCL operating frequency is necessary. 7.3.11 Timing Diagrams The TMP102-Q1 device is two-wire, SMBus, and I2C-interface compatible. Figure 8, Figure 9, Figure 10, and Figure 11 list the various operations on the TMP102-Q1 device. Parameters for Figure 8 are defined in the Timing Requirements table. The bus definitions are defined as follows: Bus Idle Both SDA and SCL lines remain high. Start Data Transfer A change in the state of the SDA line, from high to low, when the SCL line is high, defines a START condition. Each data transfer is initiated with a START condition. Stop Data Transfer A change in the state of the SDA line from low to high when the SCL line is high defines a STOP condition. Each data transfer is terminated with a repeated START or STOP condition. Data Transfer The number of data bytes transferred between a START and a STOP condition is not limited and is determined by the master device. The TMP102-Q1 device can also be used for single byte updates. To update only the MS byte, terminate the communication by issuing a START or STOP communication on the bus. Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: TMP102-Q1 |
Podobny numer części - TMP102 |
|
Podobny opis - TMP102 |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |