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AD9154-FMC-EBZ Arkusz danych(PDF) 2 Page - Analog Devices

Numer części AD9154-FMC-EBZ
Szczegółowy opis  Quad, 16-Bit, 2.4 GSPS, TxDAC Digital-to-Analog Converter
Download  124 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9154-FMC-EBZ Arkusz danych(HTML) 2 Page - Analog Devices

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AD9154
Data Sheet
Rev. B | Page 2 of 124
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 3
Detailed Functional Block Diagram .............................................. 4
Specifications..................................................................................... 5
DC Specifications ......................................................................... 5
Digital Specifications ................................................................... 6
Maximum DAC Update Rate Speed Specifications by Supply.... 7
JESD204B Serial Interface Speed Specifications ...................... 7
SYSREF to DAC Clock Timing Specifications ......................... 8
Digital Input Data Timing Specifications ................................. 8
Latency Variation Specifications ................................................ 9
JESD204B Interface Electrical Specifications ........................... 9
AC Specifications........................................................................ 10
Absolute Maximum Ratings.......................................................... 11
Thermal Resistance .................................................................... 11
ESD Caution................................................................................ 11
Pin Configuration and Function Descriptions........................... 12
Typical Performance Characteristics ........................................... 14
Terminology .................................................................................... 20
Theory of Operation ...................................................................... 21
Serial Port Operation ..................................................................... 22
Data Format ................................................................................ 22
Serial Port Pin Descriptions...................................................... 22
Serial Port Options..................................................................... 22
Chip Information............................................................................ 24
Device Setup Guide ........................................................................ 25
Step 1: Start Up the DAC........................................................... 25
Step 2: Digital Datapath............................................................. 26
Step 3: Transport Layer.............................................................. 26
Step 4: Physical Layer................................................................. 27
Step 5: Data Link Layer.............................................................. 28
Step 6: Error Monitoring ........................................................... 28
DAC PLL Setup............................................................................ 28
Interpolation ............................................................................... 29
JESD204B Setup.......................................................................... 29
Equalization Mode Setup .......................................................... 30
Link Latency Setup..................................................................... 30
Crossbar Setup............................................................................ 32
JESD204B Serial Data Interface.................................................... 33
JESD204B Overview .................................................................. 33
Physical Layer ............................................................................. 34
Data Link Layer .......................................................................... 37
Transport Layer .......................................................................... 45
JESD204B Test Modes ............................................................... 58
JESD204B Error Monitoring..................................................... 59
Digital Datapath ............................................................................. 62
Dual Paging................................................................................. 62
Data Format ................................................................................ 62
Interpolation Modes .................................................................. 62
Digital Modulation..................................................................... 63
Inverse Sinc ................................................................................. 64
Digital Gain, Phase Adjust, DC Offset, and Group Delay.... 64
I to Q Swap.................................................................................. 65
NCO Alignment ......................................................................... 65
Downstream Protection ............................................................ 66
Datapath PRBS ........................................................................... 68
DC Test Mode............................................................................. 69
Interrupt Request Operation ........................................................ 70
Interrupt Service Routine.......................................................... 70
DAC Input Clock Configurations ................................................ 72
Driving the CLK± Inputs .......................................................... 72
DAC PLL Fixed Register Writes............................................... 72
Condition Specific Register Writes.......................................... 72
Starting the PLL.......................................................................... 73
Analog Outputs............................................................................... 75
Transmit DAC Operation.......................................................... 75
Normal and Mix Modes of Operation..................................... 76
Temperature Sensor ....................................................................... 77
Example Start-Up Sequence.......................................................... 78
Step 1: Start Up the DAC........................................................... 78
Step 2: Digital Datapath............................................................. 78
Step 3: Transport Layer.............................................................. 79
Step 4: Physical Layer................................................................. 79
Step 5: Data Link Layer.............................................................. 80
Step 6: Error Monitoring ........................................................... 80
Board Level Hardware Considerations........................................ 81


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