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AD9154-M6720-EBZ Arkusz danych(PDF) 7 Page - Analog Devices

Numer części AD9154-M6720-EBZ
Szczegółowy opis  Quad, 16-Bit, 2.4 GSPS, TxDAC Digital-to-Analog Converter
Download  124 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9154-M6720-EBZ Arkusz danych(HTML) 7 Page - Analog Devices

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Data Sheet
AD9154
Rev. B | Page 7 of 124
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
CS to SCLK
Setup Time
tSCS
5
ns
Hold Time
tHCSCS
2
ns
1 See Table 3 for detailed specifications for DAC update rate conditions.
2 Maximum speed for 1× interpolation is limited by the JESD204B interface. See Table 4 for details.
3 Maximum speed for 2× interpolation is limited by the JESD204B interface. See Table 4 for details.
4 See Table 4 for detailed specifications for JESD204B speed conditions.
5 CLK+/CLK− serve as a reference oscillator input for the on-chip PLL clock multiplier when in use.
6 K, F, and S are JESD204B transport layer parameters. See Table 42 for the full definitions.
7 See Table 5 for detailed specifications for SYSREF to DAC clock timing conditions.
MAXIMUM DAC UPDATE RATE SPEED SPECIFICATIONS BY SUPPLY
AVDD33 = 3.3 V, SIOVDD33 = 3.3 V, IOVDD = 1.8 V, DVDD12 = 1.2 V, CVDD12 = 1.2 V, PVDD12 = 1.2 V, SVDD12 = 1.2 V,
VTT = 1.2 V, TA = −40°C to +85°C, IOUTFS = 20 mA, unless otherwise noted.
Table 3.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
MAXIMUM DAC UPDATE RATE
DVDD12, CVDD12, PVDD12 = 1.2 V ± 5%
1.93
GSPS
DVDD12, CVDD12, PVDD12 = 1.2 V ± 2%
2.07
GSPS
DVDD12, CVDD12, PVDD12 = 1.3 V ± 2%
2.4
GSPS
JESD204B SERIAL INTERFACE SPEED SPECIFICATIONS
AVDD33 = 3.3 V, SIOVDD33 = 3.3 V, IOVDD = 1.8 V, DVDD12 = 1.2 V, CVDD12 = 1.2 V, PVDD12 = 1.2 V, SVDD12 = 1.2 V, VTT = 1.2 V,
TA = −40°C to +85°C, IOUTFS = 20 mA, unless otherwise noted.
Table 4.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
CLOCK AND DATA RECOVERY
(CDR) HALF RATE MODE
SVDD12 = 1.2 V ± 5%
5.74
9.04
Gbps
SVDD12 = 1.2 V ±2%
5.74
9.65
Gbps
SVDD12 = 1.3 V ± 2%
5.74
10.96
Gbps
CDR FULL RATE MODE
SVDD12 = 1.2 V ± 5%
2.87
4.79
Gbps
SVDD12 = 1.2 V ±2%
2.87
4.93
Gbps
SVDD12 = 1.3 V ± 2%
2.87
5.73
Gbps
CDR OVERSAMPLING MODE
SVDD12 = 1.2 V ± 5%
1.44
2.39
Gbps
SVDD12 = 1.2 V ±2%
1.44
2.50
Gbps
SVDD12 = 1.3 V ± 2%
1.44
2.93
Gbps


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