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AD9154-M6720-EBZ Arkusz danych(PDF) 11 Page - Analog Devices

Numer części AD9154-M6720-EBZ
Szczegółowy opis  Quad, 16-Bit, 2.4 GSPS, TxDAC Digital-to-Analog Converter
Download  124 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9154-M6720-EBZ Arkusz danych(HTML) 11 Page - Analog Devices

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Data Sheet
AD9154
Rev. B | Page 11 of 124
ABSOLUTE MAXIMUM RATINGS
Table 10.
Parameter
Rating
I120 to Ground
−0.3 V to AVDD33 + 0.3 V
SERDINx±, V
TT, SYNCOUTx±, and
TXENx
−0.3 V to SIOVDD33 + 0.3 V
OUTx±
−0.3 V to AVDD33 + 0.3 V
SYSREF±
GND − 0.5 V
CLK± to Ground
−0.3 V to PVDD12 + 0.3 V
RESET, IRQ, CS, SCLK, SDIO, SDO,
and PDP OUTx to Ground
−0.3 V to IOVDD + 0.3 V
LDO_BYP1
−0.3 V to SVDD12 + 0.3 V
LDO_BYP2
−0.3 V to PVDD12 + 0.3 V
Ambient Operating Temperature (T
A)
−40°C to +85°C
Junction Temperature
125°C
Storage Temperature
−65°C to +150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
The exposed pad (EPAD) must be soldered to the ground plane
for the 88-lead LFCSP. The EPAD provides an electrical,
thermal, and mechanical connection to the board.
Typical θJA, θJB, and θJC values are specified for a 4-layer, JESD51-7
high effective thermal conductivity test board for leaded
surface-mount packages. θJA is obtained in still air conditions
(JESD51-2). Airflow increases heat dissipation, effectively reducing
θJA. θJB is obtained following double-ring cold plate test conditions
(JESD51-8). θJC is obtained with the test case temperature moni-
tored at the bottom of the exposed pad.
ΨJT and ΨJB are thermal characteristic parameters obtained with
θJA in still air test conditions.
Junction temperature (TJ) can be estimated using the following
equations:
TJ = TT + (ΨJT × P),
or
TJ = TB + (ΨJB × P)
where:
TT is the temperature measured at the top of the package.
P is the total device power dissipation.
TB is the temperature measured at the board.
Table 11. Thermal Resistance
Package
θ
JA
θ
JB
θ
JC
Ψ
JT
Ψ
JB
Unit
88-Lead LFCSP1
22.6
5.59
1.17
0.1
5.22
°C/W
1 The exposed pad must be securely connected to the ground plane.
ESD CAUTION


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