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TLP705A Arkusz danych(PDF) 5 Page - Toshiba Semiconductor |
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TLP705A Arkusz danych(HTML) 5 Page - Toshiba Semiconductor |
5 / 16 page TLP705A 5 11. 11. 11. 11. Switching Characteristics (Note) Switching Characteristics (Note) Switching Characteristics (Note) Switching Characteristics (Note) (Unless otherwise specified, T (Unless otherwise specified, T (Unless otherwise specified, T (Unless otherwise specified, Taaaa = -40 to 100 = -40 to 100 = -40 to 100 = -40 to 100 )))) Characteristics Propagation delay time (L/H) Propagation delay time (H/L) Propagation delay time (L/H) Propagation delay time (H/L) Propagation delay skew (device to device) Pulse width distortion Rise time Fall time Common-mode transient immunity at output high Common-mode transient immunity at output low Symbol tpLH tpHL tpLH tpHL tpsk |tpHL-tpLH| tr tf CMH CML Note (Note 1) (Note 1) (Note 1) (Note 1) (Note 1) (Note 4) (Note 1) (Note 1) (Note 1) (Note 2) (Note 3) Test Circuit Fig. 12.1.7 Fig. 12.1.8 Test Condition IF = 0 → 10 mA, VCC = 20 V, Rg = 30 Ω, Cg = 1 nF,Ta = 25 IF = 10 → 0 mA, VCC = 20 V, Rg = 30 Ω, Cg = 1 nF,Ta = 25 IF = 0 → 10 mA, VCC = 20 V, Rg = 30 Ω, Cg = 1 nF IF = 10 → 0 mA, VCC = 20 V, Rg = 30 Ω, Cg = 1 nF IF = 0 ←→ 10 mA, VCC = 20 V, Rg = 30 Ω, Cg = 1 nF IF = 0 ←→ 10 mA, VCC = 20 V, Rg = 30 Ω, Cg = 1 nF IF = 0 → 10 mA, VCC = 20 V, Rg = 30 Ω, Cg = 1 nF IF = 10 → 0 mA, VCC = 20 V, Rg = 30 Ω, Cg = 1 nF VCM = 1000 Vp-p, IF = 10 mA, VCC = 20 V, Ta = 25 , VO(min) = 16 V VCM = 1000 Vp-p, IF = 0 mA, VCC = 20 V, Ta = 25 , VO(max) = 1 V Min 50 50 -85 ±20 ±20 Typ. 125 120 125 120 5 35 15 Max 170 170 200 200 85 50 Unit ns kV/µs Note: All typical values are at Ta = 25 . Note 1: Input signal ( f = 250 kHz, duty = 50 %, tr = tf = 5 ns or less ). CL is approximately 15 pF which includes probe and stray wiring capacitance. Note 2: CMH is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic high state (VO > 16 V). Note 3: CML is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic low state (VO < 1 V). Note 4: The propagation delay skew, tpsk, is equal to the magnitude of the worst-case difference in tpHL and/or tpLH that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc). 2015-12-25 Rev.5.0 ©2015 Toshiba Corporation |
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