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TLP719 Arkusz danych(PDF) 2 Page - Toshiba Semiconductor

Numer części TLP719
Szczegółowy opis  Digital logic ground isolation Line receivers Microprocessor system interfaces Switching power supply feedback control Industrial invertors
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Producent  TOSHIBA [Toshiba Semiconductor]
Strona internetowa  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TLP719 Arkusz danych(HTML) 2 Page - Toshiba Semiconductor

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TLP719
2015-11-30
2
Absolute Maximum Ratings (Ta = 25 °C)
Characteristic
Symbol
Rating
Unit
Forward current
IF
25
mA
Forward current derating (Ta
≥ 70 °C)
IF/ Ta
-0.45
mA / °C
Pulse forward current
(Note 1)
IFP
50
mA
Peak transient forward current
(Note 2)
IFPT
1
A
Reverse voltage
VR
5
V
Diode power dissipation
(Note 3)
PD
45
mW
Junction temperature
Tj
125
°C
Output current
IO
8
mA
Peak output current
IOP
16
mA
Output voltage
VO
−0.5 to 20
V
Supply voltage
VCC
−0.5 to 30
V
Output power dissipation
PO
100
mW
Output power dissipation derating (Ta
≥ 70 °C)
Po / Ta
-1.8
mW / °C
Junction Temperature
Tj
125
°C
Operating temperature range
Topr
−55 to 100
°C
Storage temperature range
Tstg
−55 to 125
°C
Lead soldering temperature (10 s)
Tsol
260
°C
Isolation voltage (AC, 60 s, R.H.
≤ 60 %)
(Note 4)
BVS
5000
Vrms
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note :
A ceramic capacitor (0.1
μF) should be connected from pin 6 to pin 4 to stabilize the operation of the
high-gain linear amplifier. Failure to provide the bypassing may impair the switching property.
The total lead length between capacitor and coupler should not exceed 1 cm.
Note 1: 50% duty cycle, 1 ms pulse width.
Derate 0.9 mA / °C above 70 °C.
Note 2: Pulse width
≤ 1 μs, 300 pps.
Note 3: Derate 0.8 mW / °C above 70 °C.
Note 4: Device considered a two-terminal device: pins 1, 2 and 3 paired with pins 4, 5 and 6 respectively.


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